Graphics & AI Processor Design Engineer

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$178,400–$267,600 / yr
Posted
9 days ago
Freshness
Confirmed live yesterday
Closes
Sep 2, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $201k
This role $223k
$138k most similar roles pay here $281k

This role pays more than 72% of similar roles. Most pay $174,675–$228,125 — the shaded band above. At the midpoint, this role pays about $223k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Graphics & AI Processor Design Engineer

As a Graphics & AI Processor Design Engineer, you will collaborate with GPU architects to design next-generation graphics and AI technology. Your primary responsibilities involve designing the command processor, which serves as the front-end of the GPU pipeline for both GPU and AI engines. You will work to implement logic that achieves high performance and lower power while meeting specific timing requirements. Additionally, you will coordinate with verification engineers to improve code and functional coverage, conduct design rule checks like LINT and CDC for tape-out sign-off, and assist the post-silicon team in debugging silicon issues. The role requires expertise in computer organization and architecture, familiarity with EDA tools such as VCS, Cadence, or Mentor Graphics, and experience in ASIC design to solve complex hardware challenges within the graphics and AI processor domain.

What you'll do

  • Design the command processor for next-generation GPU and AI engine front-ends.
  • Implement high-performance, low-power logic that meets specific timing requirements.
  • Collaborate with architects to integrate advanced graphics and AI technologies.
  • Coordinate with verification engineers to improve code quality and functional coverage.
  • Perform design rule checks including LINT and CDC for tape-out sign-off.
  • Debug silicon issues in coordination with the post-silicon team.

What we're looking for

  • Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
  • Multiple years of related ASIC design experience.
  • Experience with project-level design concepts.
  • Familiarity with EDA tools and functional verification tools such as VCS, Cadence, or Mentor Graphics.
  • Strong understanding of computer organization and architecture.
  • Knowledge of graphics and AI technology is preferred.
  • Prior experience in a design lead role is advantageous.
  • Excellent communication, analytical, and problem-solving skills.

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