This role pays more than
64%
of similar roles. Most pay
$177,250–$241,750
— the shaded band above.
At the midpoint, this role pays about
$214k
versus about
$210k
for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has
3513 open roles
on FindRole.
Listed pay typically runs
$165,800–$277,600
across 2730 roles with salary data.
As a GPU Physical Design Engineer within the Silicon Technologies group, you will be responsible for implementing complete chip designs from RTL to tapeout for high-performance, power-efficient GPUs. You will work closely with front-end teams to understand architecture and drive physical aspects early in the design cycle while developing construction and optimization recipes for performance, power, and area. Your daily responsibilities include managing place and route engineers, resolving flow issues, and establishing best known methods to streamline production on advanced technology nodes. The role requires expertise in floorplanning partitions, placement and routing, static timing analysis, and physical design verification. You will manage complex requirements such as multi-voltage, power gating, and thermal management for large GPU designs exceeding 20 million gates at frequencies over 1GHz while integrating internal and external IP components into the final silicon.
Implement complete chip design from RTL through tapeout for high-performance GPU designs.
Drive physical design construction and optimization recipes to improve performance, power, and area (PPA).
Collaborate with front-end teams to integrate architectural requirements into early floorplanning and physical implementation.
Develop methodologies, guidelines, and checklists to streamline physical design workflows and execution.
Manage place and route engineers by setting goals, planning work, and managing cross-domain dependencies.
Resolve complex design and flow issues related to physical design and signoff.
Integrate internal and external IP components while ensuring requirements are met in the physical domain.
Address manufacturing challenges including Design for Yield, multi-Vt strategies, and thermal management.
What we're looking for
Bachelor of Science degree and 3 years of relevant experience.
Experience with floorplanning partitions, route and placement flow experiments, static timing review, or physical design verification results.
Ability in all aspects of ASIC implementation including Synthesis, DFT, Floorplanning, Clock/Power distribution, Place and Route, and signoff (preferred).
Experience with multi-voltage, power gated, and power retention features (preferred).
Practical knowledge of hierarchical design, top-down design, budgeting, timing, and physical convergence (preferred).
Experience integrating internal and external vendor IPs and specifying requirements in the physical domain (preferred).
Expertise with large GPU designs exceeding 20M gates at frequencies over 1GHz using new technologies (preferred).
Familiarity with process-related issues including Design for Yield, Manufacturability, multi Vt strategies, and thermal management (preferred).