GPU Physical Design Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
11 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $207k
This role $255k
$131k most similar roles pay here $346k

This role pays more than 92% of similar roles. Most pay $177,250–$236,262 — the shaded band above. At the midpoint, this role pays about $255k versus about $207k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2254 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1841 roles with salary data.

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At a glance

TL;DR · GPU Physical Design Engineer

As a GPU Physical Design Engineer within the Silicon Technologies group, you will be responsible for implementing complete chip designs from RTL to tapeout for high-performance, power-efficient GPUs. You will work closely with front-end teams to drive physical aspects early in the design cycle and develop construction and optimization recipes for performance, power, and area. Your daily responsibilities include serving as a focal point for place and route, resolving complex flow issues, and managing dependencies across various domains like top, STA, and block placement. You will utilize industry-standard implementation tools, TCL, Perl, or Python scripting to manage large GPU designs exceeding 20 million gates at frequencies over 1GHz. The role involves solving critical problems in multi-voltage systems, power gating, thermal management, and integrating complex IP from both internal and external vendors.

What you'll do

  • Implement complete chip designs from RTL through tapeout on advanced technology nodes.
  • Drive physical design construction and optimization recipes to improve performance, power, and area (PPA).
  • Serve as the focal point for place and route tasks, including goal setting and planning.
  • Resolve complex design and flow issues related to physical implementation and signoff.
  • Integrate internal and external IP while managing requirements in the physical domain.
  • Develop and implement automated scripts using TCL, Perl, or Python to streamline workflows.
  • Manage multi-voltage, power gated, and power retention designs for large GPU architectures.
  • Address manufacturing concerns including design for yield, thermal management, and multi-Vt strategies.

What we're looking for

  • Bachelor of Science degree and 10 years of relevant experience.
  • Experience with industry standard physical implementation tools and PPA optimization flows.
  • Experience with TCL, Perl, or Python scripting.
  • Experience creating and analyzing floorplanning tools, P&R flows, static timing, and Physical Design Verification Flows.
  • Proven ability in all aspects of ASIC implementation including Synthesis, DFT, Floorplanning, Clock/Power distribution, and signoff (preferred).
  • Experience with multi-voltage, power gated, and power retention features (preferred).
  • Knowledge of hierarchical design, top-down design, budgeting, timing, and physical convergence (preferred).
  • Experience integrating internal and external vendor IPs and managing large GPU designs over 20M gates (preferred).

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