FPGA Engineer

General Dynamics

Confirmed live 2 days ago High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Annapolis Junction, MD
Salary
$109,013–$114,975 / yr
Posted
14 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $186k
This role $112k
$96k most similar roles pay here $233k

This role pays less than 96% of similar roles. Most pay $158,437–$214,000 — the shaded band above. At the midpoint, this role pays about $112k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1123 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 984 roles with salary data.

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View all roles at General Dynamics

At a glance

TL;DR · FPGA Engineer

As an FPGA Engineer, you will join a cross-functional team responsible for the full product lifecycle of cost-sensitive secure products. Your daily responsibilities involve managing design from system architecture and requirements allocation through to final product release and production. You will work on complex technical challenges including static timing analysis, timing closure, and floor planning for designs featuring embedded hard and soft processors with commercial and custom IP. The role requires proficiency in VHDL, Verilog, SystemVerilog, and TCL, utilizing tools like Vivado. Key technical requirements include experience with Zynq UltraScale+ MPSoC FPGAs, Git version control, and CI/CD flows. You will also work with Multi-Gigabit Transceivers, various bus protocols such as Ethernet and SPI, and external memory interfaces like DRAM or SRAM to solve critical problems in the defense and scientific domains.

What you'll do

  • Design products from system architecture and requirements allocation through production.
  • Develop hardware designs using VHDL, Verilog, or SystemVerilog.
  • Implement high-speed bus protocols including Ethernet, Interlaken, Aurora, SPI, and I2C.
  • Perform static timing analysis, timing closure, and floor planning for FPGA designs.
  • Integrate custom and commercial IP with embedded hard and soft processors.
  • Manage version control and CI/CD flows using Git for FPGA projects.
  • Interface hardware components with external memory such as DRAM and SRAM.
  • Utilize Vivado or similar tools to develop cost-sensitive secure products.

What we're looking for

  • Must possess a Bachelor's degree in Electrical or Computer Engineering (or related field) plus 2 years of experience, or a Master's degree plus 6 months of experience.
  • Ability to obtain and maintain a Department of Defense TS/SCI security clearance is required.
  • U.S. citizenship is required for eligibility to access classified information.
  • Proficiency in FPGA design principles, techniques, and staying current with technology trends.
  • Experience with VHDL, Verilog, SystemVerilog, TCL, Vivado, or similar tools.
  • Experience with Zynq UltraScale+ MPSoC FPGAs and related technologies like Petalinux, Yocto, or Buildroot.
  • Proficiency in technical communication, creative thinking, and multi-tasking.
  • Familiarity with high-speed transceivers (GTX/GTH/GTY), bus protocols (Ethernet, SPI, I2C), and memory interfaces (DRAM/SRAM).

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