FPGA Engineer

General Dynamics

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Hybrid

Quick summary

Work type
Hybrid
Location
Annapolis Junction, MD
Salary
$120,165–$126,735 / yr
Posted
59 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $184k
This role $123k
$108k $234k
below market most similar roles pay here above market

This role pays less than 92% of similar roles. Most pay $153,687–$214,000 — the blue band above. At the midpoint, this role pays about $123k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1377 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 1184 roles with salary data.

Most-posted roles

View all roles at General Dynamics

At a glance

TL;DR · FPGA Engineer

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The FPGA Engineer joins a cross-functional team responsible for product design from system architecture and requirements allocation through product release and production of cost-sensitive secure products. The engineer will perform FPGA design, keeping abreast of technology trends while managing issues, impacts, and corrective actions. Key responsibilities include working with VHDL, Verilog, SystemVerilog, and TCL languages. The role involves utilizing Vivado tools and Zynq UltraScale+ MPSoC FPGAs. Candidates should possess skills in Petalinux, Yocto, or Buildroot, and Git for version control. Technical requirements include experience with Multi-Gigabit Transceivers, bus protocols like Ethernet, Interlaken, and SPI, and interfacing with DRAM or SRAM. The engineer must also perform static timing analysis, timing closure, and floor planning for designs featuring embedded hard and soft processors.

Skills

VHDL Verilog SystemVerilog TCL Vivado Petalinux Yocto Buildroot Git CI/CD Ethernet Interlaken Aurora SerialLite II RS-232 SPI I2C CAN DRAM SRAM Static Timing Analysis

What you'll do

  • Design products from system architecture and requirements allocation through production.
  • Develop cost-sensitive secure products using VHDL, Verilog, or SystemVerilog.
  • Perform static timing analysis, timing closure, and floor planning for complex designs.
  • Interface designs with external memory such as DRAM and SRAM.
  • Implement high-speed bus protocols including Ethernet, Interlaken, and Aurora.
  • Manage version control and CI/CD flows for FPGA designs using Git.
  • Integrate embedded hard and soft processors with commercial and custom IP.

What we're looking for

  • U.S. citizenship is required.
  • Ability to obtain a Department of Defense TS/SCI security clearance is required.
  • Bachelor's degree in Electrical or Computer Engineering, or a related field, plus 2 years of relevant experience.
  • Master's degree plus 6 months of relevant experience.
  • Proficiency in FPGA design principles and techniques.
  • Proficiency in written and verbal communications.
  • Experience with VHDL/Verilog/SystemVerilog and TCL or similar languages (preferred).
  • Experience with Zynq processors, Petalinux, Yocto, Buildroot, Git, MGTs, bus protocols, and memory interfaces (preferred).

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