Distinguished Technologist, AI Model Performance Architect

HP Inc.

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Spring, TXPalo Alto, CA
Salary
$190,000–$274,000 / yr
Posted
139 days ago
Freshness
Confirmed live today
Closes
Dec 7, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $230k
This role $232k
$155k $303k
below market most similar roles pay here above market

This role pays less than 55% of similar roles. Most pay $195,750–$263,437 — the blue band above. At the midpoint, this role pays about $232k versus about $230k for comparable roles.

Based on 240 similar postings.

Employer

About HP Inc.

HP Inc. is a global technology company that develops and sells personal computers, printers, and related supplies and services. Its products include laptops, desktops, workstations, and printing solutions for consumers and businesses worldwide.

HP Inc. currently has 115 open roles on FindRole.

Listed pay typically runs $130,700–$205,200 across 95 roles with salary data.

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At a glance

TL;DR · Distinguished Technologist, AI Model Performance Architect

The Distinguished Technologist - AI Model Performance Architect joins the engineering team to bridge system memory architecture with AI model behavior through hardware and software co-design. This role focuses on developing AI workload optimization strategies to improve inferencing efficiency, reduce memory needs, and accelerate model startup. Key responsibilities include analyzing bandwidth and latency bottlenecks, modeling performance across CPU, GPU, and NPU, and simulating workload execution for resource contention. The position requires expertise in electrical engineering, hardware architecture, and systems design to define long-term technology roadmaps. Candidates must utilize tools and skills including MATLAB, FPGA, schematic capture, and simulations. The work addresses the technical challenge of aligning model structures with system architecture to solve complex performance gaps in new product development.

What you'll do

  • Analyze system bandwidth, latency, and compute bottlenecks for AI workloads.
  • Model performance across CPU, GPU, and NPU architectures.
  • Simulate workload execution to evaluate PnP tradeoffs and resource contention.
  • Optimize model execution for faster initialization, caching, and KV reuse.
  • Drive HW/SW co-design for memory, caching, and scheduling.
  • Align model structures with system architecture in partnership with ML teams.
  • Develop technology roadmaps and identify hardware engineering gaps for future growth.
  • Initiate and lead industry-leading research and development projects.

What we're looking for

  • A four-year or graduate degree in Electrical Engineering or a related discipline is required, or commensurate work experience.
  • Typically has 12+ years of work experience in electrical design, tools, software packages, or electronic hardware architecture (preferred).
  • Expertise in memory and AI model design is required.
  • Proficiency in Electrical Engineering, Electronic Engineering, and Hardware Architecture is required.
  • Skills in FPGA, MATLAB, Schematic Capture, and Simulations are required.
  • Knowledge of Computer Science, Physics, and Systems Design is required.
  • Experience in New Product Development and debugging is required.
  • Strong communication, results orientation, and digital fluency are required.

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