Memory Architect

HP Inc.

Quick summary

Work type
On-site
Location
Spring, TXTaipei, Taiwan
Salary
$147,050–$230,850 / yr
Posted
3 days ago
Closes
Dec 12, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $205k
This role $189k
$134k most similar roles pay here $270k

This role pays less than 65% of similar roles. Most pay $174,712–$235,750 — the shaded band above. At the midpoint, this role pays about $189k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About HP Inc.

HP Inc. is a global technology company that develops and sells personal computers, printers, and related supplies and services. Its products include laptops, desktops, workstations, and printing solutions for consumers and businesses worldwide.

HP Inc. currently has 79 open roles on FindRole.

Listed pay typically runs $130,700–$205,200 across 76 roles with salary data.

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View all roles at HP Inc.

At a glance

TL;DR · Memory Architect

The Memory Architect role at HP involves applying expertise in memory architectures to optimize AI PC designs by reducing memory requirements and dependencies. This senior-level position requires driving footprint optimization through tradeoff analysis of bandwidth and latency, collaborating with silicon, firmware, and OS teams on memory configurations, and influencing supplier roadmaps. The candidate will develop organization-wide methodologies, evaluate emerging technologies, and ensure compliance with development guidelines while providing feedback to enhance product quality. Key skills include memory design, computer engineering, hardware architecture, and proficiency in tools like MATLAB and schematic capture. This role demands a deep understanding of electrical hardware design and the ability to mentor less-experienced staff, contributing significantly to HP’s strategic initiatives in AI and graphics workloads.

What you'll do

  • Drive optimization of memory footprints versus bandwidth/latency tradeoffs for AI PC designs.
  • Analyze workload sensitivity to latency, bandwidth, and cache efficiency in various scenarios.
  • Optimize memory configurations for mixed workloads including AI, graphics, and productivity tasks.
  • Develop organization-wide architectures and methodologies for electrical hardware design across platforms.
  • Identify and evaluate emerging memory technologies and partnerships aligned with technology roadmaps.

What we're looking for

  • At least 10 years of experience in electrical design and tools, software packages, or related field
  • Expertise in memory architecture, placement, and optimization for AI workloads
  • Ability to model and analyze workload sensitivity for latency, bandwidth, and cache efficiency
  • Experience partnering with silicon, firmware, and OS teams on memory architectures
  • Leadership in developing organization-wide methodologies and evaluating emerging technologies
  • Proficiency in hardware design, simulations, and new product development processes
  • Strong communication skills and ability to provide tangible feedback to enhance product quality

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