This role pays more than
66%
of similar roles. Most pay
$215,915–$288,150
— the shaded band above.
At the midpoint, this role pays about
$270k
versus about
$252k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
623 open roles
on FindRole.
Listed pay typically runs
$148,300–$222,500
across 603 roles with salary data.
As Director, Yield Architecture & Engineering, you will join the Yield Management team within Process Packaging Solutions to lead the next phase of automation for yield engineering. You will be responsible for building systems, workflows, dashboards, and AI-enabled tools to make technical work more predictable and repeatable while institutionalizing governance processes like project planning, CAPA tracking, and roadmap management. The role involves developing robust data pipelines, engineering applications, and scalable platforms to improve signal detection and root-cause analysis. You will lead a distributed team of software and data engineers, fostering a collaborative culture through shared standards. Key technical requirements include proficiency in Python, database systems, APIs, CI/CD, and machine learning for anomaly detection. This role addresses the challenge of translating complex semiconductor yield, diagnostics, and manufacturing workflows into automated systems across the silicon lifecycle.
Build and automate core governance processes including project planning, roadmap tracking, CAPA tracking, and status reporting.
Develop the automation roadmap for yield management, diagnostics, analytics, and engineering operations based on business impact.
Lead the development of data pipelines, dashboards, and AI-enabled decision-support systems to improve signal detection and root-cause analysis.
Create shared standards and operating rhythms to unify a distributed team of engineers across different sites and disciplines.
Integrate cross-functional workflows by connecting data and tools across the silicon lifecycle with partners in design, manufacturing, and IT.
Lead and coach a distributed technical team specializing in software engineering, data engineering, and AI infrastructure.
Drive continuous improvement initiatives to reduce manual effort and free up senior engineering capacity for high-value tasks.
What we're looking for
Bachelor's degree with 8+ years of experience, Master's with 7+ years, or PhD with 6+ years in ASIC design, verification, validation, integration, or related fields.
Proven experience building and scaling automation platforms, data pipelines, dashboards, and AI-enabled workflows to improve engineering productivity.
Strong technical proficiency in Python, database systems, distributed compute, APIs, CI/CD, and data modeling.
Experience applying machine learning, LLMs, or AI-enabled tools for anomaly detection, diagnostics, and decision support.
Familiarity with semiconductor yield, diagnostics, test, EDA tools, manufacturing data, and hardware debug workflows.
Demonstrated experience in people leadership, including building distributed teams and establishing operating discipline across sites.
Experience managing governance processes such as project planning, roadmap tracking, CAPA tracking, and continuous improvement practices.
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