Digital Hardware Engineer, Senior

Qualcomm

Confirmed live 2 days ago High trust

Quick summary

Work type: On-site
Location: San Diego, CABoulder, CO
Salary: $129,500–$194,300 / yr
Posted: 4 days ago
Freshness: Confirmed live 2 days ago
Closes: Apr 25, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $188k

This role $162k

$118k $233k

below market most similar roles pay here above market

This role pays less than 75% of similar roles. Most pay $161,500–$214,000 — the blue band above. At the midpoint, this role pays about $162k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 585 open roles on FindRole.

Listed pay typically runs $147,900–$218,400 across 559 roles with salary data.

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At a glance

TL;DR · Digital Hardware Engineer, Senior

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JOB TITLE: Digital Hardware Engineer, Senior The Wireless R&D group is seeking a Digital Hardware Engineer, Senior to support the development of a Test Base Station for verifying mobile chipset functionality. This role focuses on the 6GR physical layer, requiring the candidate to translate system requirements into efficient digital implementations. Key responsibilities include the architecture, implementation, and verification of FPGA/SOC designs, as well as achieving product development milestones. The candidate must utilize VHDL, Verilog, or System Verilog alongside simulator and synthesis CAD tools. Required technical skills include HDL Design Verification, high-speed interfaces like PCIe, Ethernet, and UCIE, and SOC interconnect standards such as AXI or AMBA. Experience with Linux, Python, C/C++, and Matlab is also relevant for this wireless standards development work.

Skills

FPGA ASIC Verilog System Verilog VHDL RTL HDL Design Verification AXI AHB AMBA Wishbone JREG Avalon PCIe Ethernet UCIE Linux Python C C++ Matlab HLS RTOS Git 3GPP Signal Processing

What you'll do

Architect, implement, and verify FPGA and SoC designs.
Translate system requirements into efficient digital implementations meeting performance specifications.
Perform HDL Design Verification (DV) using VHDL, Verilog, or SystemVerilog.
Develop and document product development milestones and deliverables.
Analyze and interpret 3GPP and other wireless physical layer specifications.
Present technical design reviews to cross-disciplinary engineering teams.
Support the commercialization of new hardware and features.

What we're looking for

Bachelor's degree in a related field and 2+ years of relevant engineering experience, a Master's degree and 1+ year of experience, or a PhD.
2+ years of experience in FPGA or ASIC design from RTL/HDL through simulation, synthesis, and on-target verification.
2+ years of experience with VHDL, Verilog, or System Verilog and related simulator/synthesis CAD tools.
Experience in HDL Design Verification (DV).
Understanding and use of high-speed interfaces such as PCIe, Ethernet, and UCIE.
Understanding of SOC interconnect standards such as AXI, AHB, AMBA, Wishbone, JREG, or Avalon.
Experience with Linux development environments and product development environments with an affinity for hands-on lab work.
Knowledge of signal processing, digital communications, and wireless physical layer specifications (preferred).

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