Design Verification Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$150,400–$225,300 / yr
Posted
14 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $201k
This role $188k
$140k most similar roles pay here $245k

This role pays more than 50% of similar roles. Most pay $168,500–$233,050 — the shaded band above. At the midpoint, this role pays about $188k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Design Verification Engineer

As a Design Verification Engineer, you will join the hardware team to ensure bug-free first silicon for specific SoC and IP components. Your daily responsibilities involve developing detailed test and coverage plans based on micro-architecture, creating scalable verification methodologies, and building comprehensive environments including stimulus, checkers, assertions, and trackers. You will manage design bring-up, regression enabling, and the debugging of test failures while tracking progress through various metrics. The role requires technical expertise in Verilog for test-benches, C and C++ for reference models, and Python or TCL for scripting and data analysis. Additionally, you will utilize MATLAB for probabilistic modeling to ensure seamless analog and digital circuit interactions. This position focuses on the critical task of achieving verification closure across block, IP, and SoC levels within complex integrated circuit designs.

What does a Design Verification Engineer earn in California?

Median $190598 from 33 postings across 7 companies.

See salary data

What you'll do

  • Develop detailed test and coverage plans based on the micro-architecture of the SoC/IP.
  • Create scalable and portable verification methodologies suitable for specific IP requirements.
  • Build comprehensive verification environments including stimulus, checkers, assertions, trackers, and coverage components.
  • Execute design bring-up, DV environment bring-up, and regression testing for all features.
  • Debug test failures and track progress using metrics such as bug counts and coverage percentages.
  • Write Python or TCL scripts to automate tasks and process data.
  • Develop stimulus and checkers to ensure seamless interaction between analog and digital circuits.
  • Create reference models in C and C++ to accurately predict design behavior.

What we're looking for

  • Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
  • Experience or education using digital design and analog knowledge to create architecture and micro-architecture for designs.
  • Verilog knowledge to create synthesizable digital designs and test-benches to verify designs.
  • C and C++ skills to create reference models of the design under test to predict behavior.
  • Python proficiency for data analysis, processing, visualization, and machine learning implementation.
  • Experience executing chip design flow from specification to verification closure.
  • Matlab programming experience to analyze probabilistic modeling and data analysis.
  • Proficiency in scripting languages like Perl or Python to create executable scripts.

More like this

Similar roles