CPU Design Timing Engineer
Apple Inc
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Market check
How this pay compares to similar roles
This role pays less than 58% of similar roles. Most pay $171,125–$245,200 — the shaded band above. At the midpoint, this role pays about $187k versus about $208k for comparable roles.
Based on 240 similar postings.
Employer
Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software
Broadcom currently has 228 open roles on FindRole.
Listed pay typically runs $121,900–$195,000 across 158 roles with salary data.
Most-posted roles
At a glance
The Design Engineer - Timing Methodology joins the Timing Sign-Off group within Central Engineering to develop advanced timing sign-off methodologies for SOC and 3D/2.5D IC designs. This role involves taking ownership of methodology development, modeling, and complex studies of new concepts to improve existing solutions for high yield and optimized margins. The candidate will design and implement multi-die signoff solutions while leading EDA flow development for Primetime, Tempus, and Innovus. Required technical skills include proficiency in TCL, Python, Perl, and Unix shell for script development and flow automation, alongside experience with revision control and continuous integration tools. The role addresses the challenge of achieving high yield at advanced technology nodes through statistical data analysis, modeling, and deep knowledge of silicon technologies and production testability within a fast-paced project oriented agile environment.
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