Quick summary
- Work type
- On-site
- Location
- —
- Salary
- $184,700–$324,800 / yr
- Posted
- 15 days ago
- Freshness
- Confirmed live today
Market check
Salary context
Above market
How this pay compares to similar roles
Similar $204k
This role $255k
$126k
most similar roles pay here
$346k
This role pays more than 97% of similar roles. Most pay $167,175–$241,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $204k for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has 3513 open roles on FindRole.
Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.
Most-posted roles
- Software Engineer 287
- Machine Learning Engineer 126
- Engineering Program Manager 64
- Design Verification Engineer 49
- SoC Physical Design Engineer 43
At a glance
TL;DR · DDR Design Engineer
As a DDR Design Engineer within the DDR PHY design team, you will contribute to high-performance, low power applications by participating in all phases of the design cycle, from concept study and architecture definition to silicon bring-up and characterization. You will perform concept studies regarding performance, gate count, and power while drafting detailed design specifications and test plans alongside architecture, circuit designers, and verification engineers. Your daily work involves providing high-quality RTL descriptions with assertions, utilizing formal tools and static checkers for quality assurance, and driving functional coverage and timing closure. Key technical requirements include proficiency in Verilog or SystemVerilog, state machine design, data paths, arbitration, clock domain crossing logic, logic synthesis, and Unified Power Format. You will also manage Design For Test considerations within a mixed-signal environment to ensure bug-free first silicon.
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DDR Design Engineer
Apple Inc
Irvine, CA
15 days ago
$175,000–$308,500
Verilog
SystemVerilog
RTL Design
DDR PHY
Logic Synthesis
Timing Closure
DFT
Unified Power Format
Equivalence Checking
Assertion Writing
State Machines
Clock Domain Crossing
Mixed-Signal
Static Checkers
10+ yrs exp