DDR Design Engineer

As a DDR Design Engineer, you will join the DDR PHY design team to develop high-performance, low-power designs for upcoming products. You will be involved in every phase of the development cycle, including concept studies, architecture definition, design, verification, and silicon bring-up characterization. Your daily responsibilities involve performing concept studies regarding performance, gate count, and power while writing detailed design specifications and test plans alongside architects and circuit designers. You will provide high-quality RTL descriptions with assertions using Verilog or SystemVerilog to ensure quality through formal tools and static checkers. Key technical tasks include designing state machines, data paths, arbitration, and clock domain crossing logic while managing timing constraints and logic synthesis. Additionally, you will handle Design For Test requirements, Unified Power Format for simulation, and equivalence checking within a mixed-signal environment.