DDR Design Engineer

As a DDR Design Engineer, you will join the DDR PHY design team to develop high-performance, low-power designs for upcoming products. You will be involved in every phase of the development lifecycle, including concept study, architecture definition, design, verification, silicon bring-up, and characterization. Your daily responsibilities involve performing concept studies regarding performance, gate count, and power while writing detailed design specifications and test plans alongside architects and circuit designers. You will provide high-quality RTL descriptions with assertions, utilizing formal tools and static checkers to ensure quality. Key technical requirements include proficiency in Verilog or SystemVerilog, state machine design, data paths, arbitration, and clock domain crossing logic. Additionally, you will manage logic synthesis, timing constraints, Unified Power Format, and Design for Test while ensuring bug-free first silicon through rigorous functional and code coverage.