CPU SRAM Design Engineer - Sr Staff / Principal

Qualcomm

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$179,000–$268,400 / yr
Posted
2 days ago
Closes
Dec 1, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $224k
$140k most similar roles pay here $282k

This role pays more than 80% of similar roles. Most pay $168,500–$216,250 — the shaded band above. At the midpoint, this role pays about $224k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 558 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 401 roles with salary data.

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At a glance

TL;DR · CPU SRAM Design Engineer - Sr Staff / Principal

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Join Qualcomm’s high-performance CPU team as a Senior SRAM Design Engineer where you will own custom SRAM and RF designs from schematic capture to analysis and model generation. This role involves developing digital circuits for high-speed and low-power SRAMs, including layout planning, functional verification, simulation, and timing characterization. You will work with industry-standard tools like NanoTime, Ansys EMIR analysis, ESP-CV, and Liberate power analysis, requiring strong knowledge of semiconductor device fundamentals and variation-aware simulation in advanced technology nodes. This position demands expertise in SRAM and Register File techniques, high-performance design features, and memory logical models, contributing to the team’s efforts in modeling, DFT, and flow development to address PPA challenges at scale.

Skills

SRAM Register_File High_Performance_Design Low_Power_Design Semiconductor_Device_Fundamentals Variation_Aware_Simulation Custom_Memory_Layout NanoTime Ansys_EMIR_Analysis ESP_CV Liberate_Power_Analysis Verilog BIST DFT Memory_Analysis_Flow_Development

What you'll do

  • Design custom digital circuits for high-speed and low-power SRAM.
  • Capture schematics and plan layouts for memory designs.
  • Conduct functional verification and simulation of memory circuits.
  • Characterize timing and perform margin verification on designs.
  • Generate deliverable collateral models through comprehensive analysis.

What we're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering with extensive industry experience (10+ years).
  • Expertise in SRAM and register file design techniques.
  • Proficiency in high-performance and low-power design features.
  • Experience with variation-aware simulation in advanced technology nodes.
  • Strong knowledge of semiconductor device fundamentals and physical implementation impact.
  • Competence in custom memory layout designs and analysis flows.
  • Proficiency with industry-standard tools for circuit simulation, timing, power, and electrical characterization.

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