CPU Post-Silicon Validation Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TXSan Diego, CA
Salary
$155,400–$233,200 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $202k
This role $194k
$138k $267k
below market most similar roles pay here above market

This role pays less than 55% of similar roles. Most pay $174,543–$229,100 — the blue band above. At the midpoint, this role pays about $194k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU Post-Silicon Validation Engineer

The CPU Post-Silicon Validation Engineer joins the CPU Silicon Bringup Team to support the bring up of every SoC using Custom CPUs from first Silicon through productization. The role involves developing CPU bring up and validation test plans, preparing for bring up on emulation and FPGA platforms, and triaging silicon failures. Key responsibilities include developing test contents, reproducing silicon fails on emulators, and architecting new debug features. Candidates must possess a BA/BS in CS/EE and experience in Silicon Validation and bring up. Required skills include implementing assembly, C/C++ embedded firmware, and using software tool chains like assemblers, C compilers, Makefiles, and source code control tools. The work requires a strong understanding of microprocessor architecture, power management, physical design concepts, and speed path debug on silicon.

What you'll do

  • Develop CPU bring-up and validation test plans with design and verification teams.
  • Perform pre-work for CPU bring-up on emulation and FPGA platforms.
  • Triage and debug functional, power, and performance failures on silicon.
  • Develop test contents and strategies to validate CPU features on silicon.
  • Reproduce silicon failures on emulators and FPGAs with verification teams.
  • Architect new debug features to improve future CPU bring-up processes.
  • Develop test vectors for tester bring-up.

What we're looking for

  • BA/BS degree in CS/EE with 5+ years of experience.
  • Experience in Silicon Validation and bring up.
  • Experience implementing assembly and C/C++ language embedded firmware.
  • Experience with software tool chains including assemblers, C compilers, Makefiles, and source code control tools.
  • Strong understanding of micro-processor architecture (preferred).
  • Strong understanding of power management and physical design concepts (preferred).
  • Experience in Silicon bring up and validation of CPU features (preferred).
  • Experience in debug of functional, power, performance, physical design issues, and speed path debug on silicon (preferred).

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