Silicon Validation Software Engineer: CPU and Memory Hierarchy

As a Silicon Validation Software Engineer: CPU and Memory Hierarchy, you will join a team of experienced engineers and debuggers to validate world-class silicon. You will develop functional validation software for CPUs, caches, and memory subsystems to identify logic design and circuit bugs before product release. Your daily responsibilities include creating targeted stress tests to expose incorrect behavior under varying voltage, frequency, and temperature conditions while analyzing logs, counters, and traces to understand system behavior. You will collaborate with SoC design and product engineering teams to root-cause issues and provide feedback on operating limits. The role requires proficiency in C/C++, Python scripting, and a deep understanding of CPU microarchitecture, cache coherency, and memory hierarchy. You will work specifically on post-silicon platforms to ensure reliability across various PVT shifts and hardware domains.