CPU Micro-architect/RTL Designer

Qualcomm

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$216,600–$325,000 / yr
Posted
39 days ago
Freshness
Confirmed live today
Closes
Mar 17, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $218k
This role $271k
$147k $344k
below market most similar roles pay here above market

This role pays more than 95% of similar roles. Most pay $181,000–$254,750 — the blue band above. At the midpoint, this role pays about $271k versus about $218k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU Micro-architect/RTL Designer

Role Posting Log in to save

JOB TITLE: CPU Micro-architect/RTL Designer The CPU Micro-architect/RTL Designer joins the CPU Engineering team to develop RTL for high performance, low power devices. This role involves collaborating with chip architects to conceive micro-architectures and defining product specifications during early life-cycle stages. Key responsibilities include performance exploration, microarchitecture development, and RTL ownership to meet power, performance, area, and timing goals. The engineer provides functional and performance verification support while coordinating with multi-functional teams on physical design implementation. Required expertise includes microprocessor architecture, specifically instruction fetch, branch prediction, out-of-order execution, and cache subsystems. Candidates must possess knowledge of Verilog, VHDL, and logic design principles, alongside experience with simulators, waveform debugging tools, and scripting languages like Perl or Python to solve complex CPU microarchitecture trade-offs.

Skills

RTL Design Microarchitecture Verilog VHDL Python Perl Logic Design Functional Verification Waveform Debugging Simulators Out-of-Order Execution

What you'll do

  • Explore high performance strategies in coordination with the CPU modeling team.
  • Develop microarchitecture specifications from early high-level exploration through detailed research.
  • Develop, assess, and refine RTL designs to meet power, performance, area, and timing goals.
  • Support the design verification team in executing the functional verification strategy.
  • Verify that the RTL design meets specific performance goals.
  • Implement and validate physical design aspects including timing, area, reliability, and testability.

What we're looking for

  • Bachelor's degree and 8+ years of relevant engineering experience, OR Master's degree and 7+ years, OR PhD and 6+ years.
  • Experience in CPU RTL development for high performance and low power devices.
  • Ability to perform micro-architecture development, specification, and performance exploration.
  • Experience in RTL ownership including development, assessment, and refinement for power, performance, area, and timing goals.
  • Knowledge of Verilog and/or VHDL (preferred).
  • Experience with simulators and waveform debugging tools (preferred).
  • Knowledge of logic design principles, timing, power implications, and low power microarchitecture techniques (preferred).
  • Experience using a scripting language such as Perl or Python (preferred).

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