CPU ML Microarchitect/RTL Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$150,400–$277,600 / yr
Posted
16 days ago
Freshness
Confirmed live yesterday

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Competitive pay

How this pay compares to similar roles

Similar $214k
This role $214k
$135k most similar roles pay here $293k

This role pays more than 55% of similar roles. Most pay $184,900–$242,200 — the shaded band above. At the midpoint, this role pays about $214k versus about $214k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · CPU ML Microarchitect/RTL Engineer

The CPU ML Microarchitect/RTL Engineer joins the Silicon Engineering Group to drive CPU machine-learning accelerator architecture and RTL development for Apple Silicon. This role involves micro-architecture development and specification, ranging from high-level exploration to detailed specifications. The engineer will own RTL design tasks including development, assessment, and refinement to meet power, performance, area, and timing goals. Responsibilities also include supporting verification through test bench development, formal methods, and simulation or emulation, alongside performing performance exploration and correlation. Required skills include microprocessor architecture knowledge, logic design principles with timing and power implications, Verilog or VHDL, and experience with simulators and waveform debugging. Preferred qualifications include expertise in out-of-order execution, instruction scheduling, cache subsystems, low power techniques, C/C++ programming, and scripting in Perl or Python to solve complex hardware challenges for high-performance microprocessors.

What you'll do

  • Develop and specify micro-architecture from high-level exploration through detailed technical specifications.
  • Own the development, assessment, and refinement of RTL designs to meet power, performance, area, and timing goals.
  • Support verification teams with test bench development, formal methods, and simulation or emulation for functional verification.
  • Explore high-performance strategies and correlate results with the performance verification team to ensure design targets are met.
  • Collaborate with multi-functional teams to implement physical designs focusing on timing, area, reliability, testability, and power.
  • Drive CPU machine-learning accelerator architecture and RTL development for Apple Silicon products.

What we're looking for

  • Minimum BS degree and 3+ years of relevant industry experience.
  • Experience with microprocessor architecture.
  • Experience with logic design principles involving timing and power implications.
  • Experience in Verilog or VHDL.
  • Experience with simulators and the waveform debugging process.
  • Expertise in out-of-order execution, instruction scheduling, integer/floating point execution, load/store execution, or cache and memory subsystems (preferred).
  • Understanding of low power microarchitecture techniques and high-performance trade-offs (preferred).
  • Experience in C, C++, Perl, or Python (preferred).

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