CPU RTL/AI Micro-Architect

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$186,700–$280,100 / yr
Posted
39 days ago
Freshness
Confirmed live yesterday
Closes
Mar 17, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $224k
This role $233k
$163k $293k
below market most similar roles pay here above market

This role pays more than 59% of similar roles. Most pay $194,208–$254,750 — the blue band above. At the midpoint, this role pays about $233k versus about $224k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU RTL/AI Micro-Architect

The CPU RTL/AI Micro-Architect - AI Development joins the CPU Engineering group to advance high-performance CPU solutions for datacenter workloads. This role focuses on integrating agentic AI-assisted design practices into the hardware engineering lifecycle. You will develop AI-driven capabilities for RTL code review, quality analysis, and automated debug acceleration, while ensuring consistency between microarchitecture documentation and implementation. Key responsibilities include generating insights for timing, power, and area tradeoffs and embedding AI into standard toolchains like lint, synthesis, and simulation. The position requires expertise in Verilog, SystemVerilog, and VHDL, alongside knowledge of CPU design techniques, low-power microarchitecture, and logic design principles. You will also utilize LLM-based engineering tools, including agentic tools like Codex and Claude Code, to improve RTL methodology and design productivity.

What you'll do

  • Apply and extend internal AI tools and agent-based workflows to improve RTL design productivity.
  • Develop AI-driven capabilities for RTL code review, quality analysis, and spec-to-RTL alignment.
  • Create automated debug acceleration tools for waveform triage and root-cause identification.
  • Use AI-assisted analysis to identify PPA tradeoffs and microarchitectural bottlenecks.
  • Embed AI capabilities into existing toolchains including lint, synthesis, simulation, and debug.
  • Integrate AI-assisted best practices into coding standards, review processes, and documentation.
  • Scale AI-enabled workflows across global programs and different geographical teams.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant engineering work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of relevant engineering work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant engineering work experience.
  • Strong knowledge in AI/LLM-based engineering tools, including agentic tools and agent-based AI development (preferred).
  • Solid experience with Verilog/SystemVerilog (or VHDL) RTL design (preferred).
  • Experience with simulation, waveform debug, and verification tools (preferred).
  • Knowledge of CPU design techniques, including logic design principles, timing/power implications, and low-power microarchitecture (preferred).
  • Knowledge of high-performance design tradeoffs (preferred).

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