This role pays more than
57%
of similar roles. Most pay
$184,625–$250,000
— the shaded band above.
At the midpoint, this role pays about
$224k
versus about
$217k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
623 open roles
on FindRole.
Listed pay typically runs
$148,300–$222,500
across 603 roles with salary data.
The CPU RTL/AI Micro-Architect - AI Development joins the CPU Engineering team to advance high-performance compute through AI-augmented engineering workflows. This role focuses on integrating agentic AI tools into standard RTL development cycles to enhance productivity and design quality. You will develop capabilities for RTL code review, specification alignment, and automated debug acceleration while identifying microarchitectural bottlenecks and PPA tradeoffs. The position involves embedding these capabilities into existing toolchains like lint, synthesis, and simulation. Key technical requirements include proficiency in Verilog or SystemVerilog, experience with waveform debug, and knowledge of low-power microarchitecture techniques. Additionally, the role requires expertise in AI/LLM-based tools, including agentic systems and prompt orchestration. The work addresses the challenge of designing and optimizing CPU architectures for datacenter environments by merging traditional hardware design with advanced AI-driven methodologies.
Apply and extend internal AI tools and agent-based workflows to improve RTL design productivity.
Develop AI capabilities for RTL code review, quality analysis, and structural correctness.
Ensure consistency between microarchitecture documentation and implementation through automated spec-to-RTL alignment.
Accelerate debug processes by implementing AI-driven waveform triage and root-cause identification.
Use AI to analyze PPA tradeoffs and identify microarchitectural bottlenecks early in the design cycle.
Embed AI capabilities into existing toolchains including linting, synthesis, simulation, and debug workflows.
Evolve RTL methodologies by integrating AI-assisted best practices into coding standards and review processes.
What we're looking for
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 6+ years of relevant engineering experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 5+ years of relevant engineering experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 4+ years of relevant engineering experience.
Experience with Verilog, SystemVerilog, or VHDL for RTL design.
Proficiency with simulation, waveform debug, and verification tools.
Knowledge of CPU design techniques including logic design principles, timing/power implications, and low-power microarchitecture.
Familiarity with AI/LLM-based engineering tools, including agentic tools and agent-based AI development like prompting and orchestration.
Experience in high-performance design tradeoffs and RTL methodology.