CPU Design Timing Engineer

As a CPU Design Timing Engineer, you will join the hardware team to manage all aspects of timing for high-performance CPU designs. You will collaborate closely with micro-architects and implementation engineers to drive timing closure while working with the CAD team to develop, construct, and modify timing flows. Your daily responsibilities include scripting to improve analysis flows and engineer efficiency, as well as performing detailed timing analysis. The role requires proficiency in script writing and debugging using TCL, Perl, or Python. You will navigate complex technical challenges such as managing multiple clock and power domains for 1 ghz+ designs, handling crosstalk, noise, OCV, and uncertainty. Experience with physical design tools like Primetime or Tempus is essential to solve critical timing issues within the CPU microarchitecture and ensure successful project closure.