ASIC Verification Engineer

Nvidia

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$100,000–$166,750 / yr
Employment
Full-time
Posted
13 days ago
Freshness
Confirmed live today
Closes
Nov 11, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k
This role $133k
$86k $233k
below market most similar roles pay here above market

This role pays less than 86% of similar roles. Most pay $152,875–$214,000 — the blue band above. At the midpoint, this role pays about $133k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer

The ASIC Verification Engineer - New College Grad 2026 joins a global team to verify the design, architecture, and micro-architecture of leading SoCs and GPUs. In this role, you will define verification scopes, develop verification infrastructure for memory subsystem units, and verify firmware code with a focus on hardware and firmware interactions. You will collaborate with architects, designers, and software engineers to solve complex technical problems. Required skills include proficiency in Object Oriented Programming with SystemVerilog and knowledge of verification methodologies using random stimulus, functional coverage, and assertion-based verification. You should have exposure to tools like VCS, Debussy, and GDB, as well as UVM. The work involves verifying high-speed IO protocols and memory coherence for products ranging from consumer graphics to self-driving cars and artificial intelligence.

What you'll do

  • Verify the design, architecture, and micro-architecture of SoCs and GPUs.
  • Define the verification scope for specific hardware components.
  • Develop verification infrastructure for memory subsystem units.
  • Verify firmware code and hardware/firmware interactions.
  • Create reusable verification components using SystemVerilog and UVM.
  • Generate random stimulus and perform functional coverage and assertion-based verification.
  • Debug embedded firmware code using C or RISC-V Assembly.
  • Write comprehensive verification plans for complex hardware designs.

What we're looking for

  • Pursue or recently complete a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
  • Demonstrate knowledge in verification methodology and creating reusable verification components.
  • Possess knowledge of verification using random stimulus, functional coverage, and assertion-based verification methodologies.
  • Maintain proficiency in Object Oriented Programming with SystemVerilog.
  • Have exposure to design and verification tools like VCS, Debussy, and GDB, as well as UVM or equivalent methodologies.
  • Prior verification experience related to high speed IO protocols or memory coherence (preferred).
  • Experience debugging embedded firmware code in C or RISC-V Assembly (preferred).
  • Knowledgeable in embedded microcontrollers and/or RISC-V Architecture (preferred).

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