ASIC Verification Engineer

Nvidia

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$100,000–$166,750 / yr
Posted
94 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k
This role $133k
$86k most similar roles pay here $233k

This role pays less than 85% of similar roles. Most pay $152,875–$212,500 — the shaded band above. At the midpoint, this role pays about $133k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer

As an ASIC Verification Engineer - New College Grad 2026, you will join a team dedicated to verifying the design, architecture, and micro-architecture of leading SoCs and GPUs. Your daily responsibilities include defining verification scopes, developing infrastructure for memory subsystem units, and verifying firmware code with a specific focus on hardware and firmware interactions. You will collaborate with architects, designers, and software engineers across multiple sites to achieve these goals. The role requires proficiency in SystemVerilog and Object Oriented Programming, along with experience in UVM or equivalent methodologies. You must be skilled in using simulation tools like VCS and debug tools such as Debussy or GDB. Technical expertise includes random stimulus, functional coverage, assertion-based verification, and potentially high speed IO protocols, memory coherence, and RISC-V architecture to solve complex hardware problems.

What you'll do

  • Verify the design, architecture, and micro-architecture of leading SoCs and GPUs.
  • Define the verification scope for various hardware components.
  • Develop verification infrastructure specifically for memory subsystem units.
  • Verify firmware code with a focus on hardware and firmware interactions.
  • Create reusable verification components using SystemVerilog and UVM methodologies.
  • Execute verification using random stimulus, functional coverage, and assertion-based methodologies.
  • Debug complex issues within the design and embedded firmware code.

What we're looking for

  • Pursue or have completed a BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
  • Knowledge of verification methodology and creating reusable verification components.
  • Knowledge of random stimulus, functional coverage, and assertion-based verification methodologies.
  • Proficiency in Object Oriented Programming with SystemVerilog.
  • Experience with design and verification tools such as VCS, Debussy, or GDB.
  • Familiarity with UVM or equivalent verification methodologies.
  • Strong problem solving skills and a passion for debugging.
  • Preferred experience includes high speed IO protocols, memory coherence, and embedded firmware debugging in C or RISC-V Assembly.

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