CAD Engineer, Silicon Learning and Static Timing Analysis

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,700–$324,800 / yr
Posted: 11 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k

This role $255k

$146k most similar roles pay here $344k

This role pays more than 87% of similar roles. Most pay $177,250–$241,937 — the shaded band above. At the midpoint, this role pays about $255k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2240 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1831 roles with salary data.

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At a glance

TL;DR · CAD Engineer, Silicon Learning and Static Timing Analysis

Role Posting Log in to save

CAD Engineer, Silicon Learning and Static Timing Analysis joins the Silicon Technologies group to support the design and manufacture of high-performance, power-efficient processors and system-on-chip designs using leading edge semiconductor technology nodes. The role involves analyzing silicon performance data to incorporate learnings into static timing analysis tools, flows, margins, and design closure methodologies. Key responsibilities include collaborating with design, DFT, CAD, and product engineering teams to design experiments, perform data mining to establish correlation metrics for design closure activities, and develop methodologies to optimize power and performance tradeoffs. Required skills include proficiency in C, Perl, Python, or Tcl coding and debugging. Preferred qualifications include experience with Primetime, Tempus, Tetramax, Tessent, and fundamentals of statistics, hypothesis testing, data mining, Machine Learning, and Design of Experiments within the context of advanced technology nodes.

Skills

Static Timing Analysis Python Tcl Perl C DFT Primetime Tempus Tetramax Tessent Machine Learning Design of Experiments Data Mining Physical Design Silicon Debug Semiconductor Processing

What you'll do

Analyze silicon performance data to improve static timing analysis tools, flows, and design closure methodologies.
Mine and analyze silicon data to establish correlation metrics for design closure activities.
Develop and deploy design closure margins to optimize power and performance tradeoffs.
Design experiments and analyze results in collaboration with design, DFT, CAD, and product engineering teams.
Refine design methodologies applied across all silicon designs at Apple.
Utilize coding skills in C, Perl, Python, or Tcl to debug and solve complex design challenges.
Apply statistical analysis, hypothesis testing, and machine learning to improve advanced semiconductor technology nodes.

What we're looking for

Bachelor of Science degree and 10 years of relevant industry experience.
Coding experience in one or more of C, Perl, Python, or Tcl.
Experience in static timing analysis, DFT, physical design, failure analysis, or CAD (preferred).
Static Timing Analysis with Primetime, Tempus, or equivalent (preferred).
Advanced coding and debugging skills coupled with an understanding of advanced technology node challenges (preferred).
Knowledge of statistics, hypothesis testing, data mining, Machine Learning, and Design of Experiments (preferred).
Prior exposure to DFT, Tetramax, Tessent, silicon debug, or semiconductor processing (preferred).