below marketmost similar roles pay hereabove market
This role pays more than
64%
of similar roles. Most pay
$177,200–$241,750
— the blue band above.
At the midpoint, this role pays about
$218k
versus about
$209k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The CAD Engineer on ML/AI for Design Verification joins the ASICS Engineering group to develop automation tools and flows for design verification. This role involves enabling state of the art EDA tools, exploring and applying the latest ML/AI technologies to improve workflows, and creating comprehensive documentation for automation processes. The engineer will apply engineering principles to optimize tools, conduct research on industry trends, and collaborate with cross-functional teams to solve complex problems. Required skills include proficiency in Python, Perl, TCL, GNU Make, and JavaScript. Candidates should possess experience in CAD, DV, or related domains, with a focus on VLSI design and verification. The work centers on enhancing productivity and reliability within the ASIC design, verification, and validation lifecycle through innovative automation and machine learning.
Develop and optimize CAD tools and flows to enhance design verification productivity and efficiency.
Enable and maintain state-of-the-art EDA tools for the design verification teams.
Explore and apply the latest ML and AI technologies to improve design verification workflows.
Conduct research on industry trends to incorporate new technologies into the company workflow.
Create and maintain detailed documentation for all automation processes and tools.
Propose and execute innovative solutions to complex problems in CAD automation capabilities.
What we're looking for
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
8+ years of working experience in CAD, DV, or related domains.
Strong programming skills in languages such as Python, Perl, TCL, GNU Make, and JavaScript.
Excellent communication and documentation skills.
Knowledge in VLSI design and verification, and EDA tools (preferred).