ASIC/FPGA Engineer V

Lockheed Martin

Quick summary

Work type
On-site
Location
Sunnyvale, CAKing of Prussia, PADenver, COHighlands Ranch, CO
Salary
$145,200–$255,990 / yr
Posted
4 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $186k
This role $201k
$129k most similar roles pay here $270k

This role pays more than 64% of similar roles. Most pay $158,850–$212,500 — the shaded band above. At the midpoint, this role pays about $201k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Lockheed Martin

Lockheed Martin is a global aerospace, defense, and security company that designs, develops, and manufactures advanced technology systems, products, and services for government and commercial customers worldwide.

Lockheed Martin currently has 602 open roles on FindRole.

Listed pay typically runs $101,000–$178,135 across 301 roles with salary data.

Most-posted roles

View all roles at Lockheed Martin

At a glance

TL;DR · ASIC/FPGA Engineer V

As an ASIC & FPGA Engineer at Lockheed Martin Space’s Silicon Solutions team, you will join a high-performing group dedicated to advancing technology in military and civil space programs. Your role involves leading a team of up to seven members, managing multiple concurrent projects using Agile and Waterfall methodologies, and ensuring project delivery within budget and schedule constraints. You will develop comprehensive project plans, mentor team members on technical best practices, and collaborate with cross-functional teams to identify new opportunities. Key responsibilities include hands-on chip architecture work, reviewing project plans, and providing performance assessments for your team. The ideal candidate has over eight years of experience in ASIC or FPGA design, debug, and verification, along with strong leadership skills and the ability to obtain a Secret clearance. Familiarity with tools like Microsoft Project, JIRA, and EVMS is desired, as well as experience in space system design and customer-facing communication.

What you'll do

  • Lead a high-performing team of up to 7 people, prioritizing and allocating daily tasks.
  • Develop and execute comprehensive project plans using Agile or Waterfall methodologies.
  • Monitor and manage team member workloads, ensuring clear communication with project engineers.
  • Provide guidance and mentorship on architecture, code, best practices, and command media.
  • Review and release all work products to agreed quality standards.
  • Perform advanced chip architecture work for new programs and opportunities.

What we're looking for

  • 8+ years of professional experience in ASIC or FPGA design, debug, and verification.
  • Proven leadership in managing or leading ASIC/FPGA projects.
  • Ability to obtain and maintain a DoD Secret clearance; US Citizenship required.
  • Strong understanding of system and hardware requirements for space applications.
  • Experience with project management tools like Microsoft Project or Atlassian JIRA.
  • High emotional intelligence (EQ) and customer-facing communication skills.
  • Knowledge of Earned Value Management System (EVMS) as a Control Accounts Manager.

More like this

Similar roles

ASIC/FPGA Design Engineer IV

Lockheed Martin

Littleton, CO 4 days ago $123,500$217,695
VHDL Verilog SystemVerilog Linux FPGAs Digital ASICs Mixed-signal ASICs Atlassian JIRA Microsoft Project Earned Value Management System CI/CD

ASIC FPGA Engineering Manager

Lockheed Martin

Sunnyvale, CA +3 4 days ago $145,200$255,990
ASIC FPGA Earned Value Management System (EVMS) Atlassian JIRA Microsoft Project AMD Versal Xilinx Versal RF Digital Signal Processing (DSP) System design Agile Waterfall Python C++ VHDL Verilog Linux Git

ASIC FPGA Design Engineer V

Lockheed Martin

North Andover, MA 4 days ago $145,200$255,990
VHDL Verilog SystemVerilog Linux AMD_Xilinx_Vivado Microchip_Libero MS_Project JIRA Earned_Value_Management_System CI/CD

ASIC/FPGA Verification Engineer III

Lockheed Martin

Sunnyvale, CA +3 4 days ago $101,000$178,135
UVM VHDL Verilog SystemVerilog Linux Python Git JIRA MS Project EVMS AMD Vivado Microchip Libero

ASIC & FPGA Design Engineer Senior

Lockheed Martin

Orlando, FL 4 days ago
VHDL Verilog SystemVerilog Xilinx Vivado AMD Vitis UltraScale design methodology Synopsys VCS AXI Ethernet TCP/IP PCIe Serial protocols High-speed oscilloscopes Spectrum analyzers Signal generators Synopsys EDA tools Simulink HDL Coder C/C++ DSP
Hybrid