ASIC Verification Engineer

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Irvine, CA
Posted: 14 days ago
Freshness: Confirmed live yesterday
Closes: Feb 20, 2027
Nearby: 99+ roles within 25 mi

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Salary context

How this pay compares to similar roles

Similar $188k

$132k most similar roles pay here $232k

This listing doesn't post a salary. Most similar roles pay $162,000–$214,000.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer

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As an ASIC Verification Engineer within the High Speed Interconnect Product group, you will participate in the full product development lifecycle to bring complex designs from concept to production. You will work alongside architecture, design, and firmware teams to ensure first-pass silicon success at both the block and chip levels. Your daily responsibilities include developing a deep understanding of IEEE Ethernet protocols, designing and maintaining advanced verification environments and testbench components, and creating custom scripts and tools to improve efficiency. The role requires proficiency in SystemVerilog, Verilog, or VHDL, with preferred skills in C/C++, Object-Oriented Programming, and scripting languages like Python, Perl, or TCL. You will solve technical challenges related to the design of high-performance PHYs for communication ASICs used in cloud computing and server virtualization.

Skills

SystemVerilog UVM Verilog VHDL C++ Python Perl TCL Ethernet ASIC Verification Logic Design Computer Architecture Object-Oriented Programming Scripting

What you'll do

Develop a deep understanding of the latest IEEE Ethernet protocols.
Design and maintain advanced verification environments and testbench components using SystemVerilog UVM.
Execute full-spectrum verification at both the block and chip levels to ensure first-pass silicon success.
Develop custom scripts and tools to improve verification efficiency and design quality.
Work across the product development lifecycle from concept to production alongside architecture, design, and firmware teams.
Verify complex communication ASIC designs for high-performance networking applications.

What we're looking for

Must possess an MSEE/CS degree (New Grad) or a BSEE/CS degree with 3+ years of direct ASIC Design/Verification experience.
Strong grasp of logic design, computer architecture, and networking protocols.
Proficiency in HDL languages including SystemVerilog, Verilog, or VHDL.
Highly preferred skills include strong C/C++ knowledge and a solid understanding of Object-Oriented Programming (OOP).
Experience with scripting languages such as Python, Perl, or TCL to automate complex workflows.
Ability to design and maintain advanced verification environments and testbench components using SystemVerilog UVM.
Knowledge of the latest IEEE Ethernet protocols.
Ability to communicate complex technical concepts effectively in a fast-paced environment.

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