ASIC Engineering Program Manager

Cisco

Remote

Quick summary

Work type
Remote
Location
San Jose, CA
Salary
$210,600–$305,100 / yr
Posted
10 days ago
Closes
Jun 30, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $195k
This role $258k
$137k most similar roles pay here $323k

This role pays more than 92% of similar roles. Most pay $168,425–$222,425 — the shaded band above. At the midpoint, this role pays about $258k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 167 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 167 roles with salary data.

Most-posted roles

View all roles at Cisco

At a glance

TL;DR · ASIC Engineering Program Manager

As a Senior Program Manager at Cisco Silicon One, you will lead complex multi-functional programs spanning silicon development, firmware, and system delivery from concept through production. You’ll coordinate efforts across various engineering teams, operations, and external vendors to ensure seamless execution and high-quality solution delivery while shaping processes for strategic alignment. Your daily responsibilities include managing all phases of ASIC development, aligning technical requirements with product management goals, and implementing process improvements to enhance efficiency in a fast-paced environment. The ideal candidate has extensive experience in program/product management or technical/engineering leadership within the semiconductor industry, including leading ASIC development programs. Proficiency in program management skills such as milestone planning, risk management, and dependency tracking is essential, along with familiarity with pre-silicon testing methods like emulation and FPGA validation.

What you'll do

  • Lead multi-functional infrastructure and ASIC development projects from concept through production.
  • Manage all phases of ASIC development to ensure seamless execution and delivery.
  • Collaborate with cross-functional teams to align technical requirements and product goals.
  • Identify and implement process improvements across teams for enhanced efficiency.
  • Drive complex, cross-functional projects spanning multiple engineering disciplines.

What we're looking for

  • Bachelor’s degree in Computer or Electrical Engineering with 12+ years of industry experience.
  • Proven leadership in delivering successful products through program/product management or technical/engineering roles.
  • Extensive experience leading ASIC development programs across the entire silicon lifecycle.
  • Expertise in managing complex, cross-functional projects involving multiple engineering disciplines.
  • Strong program management skills including milestone planning and risk management.

More like this

Similar roles

ASIC Design Engineering Technical Leader

Cisco

San Jose, CA 10 days ago $183,800$263,600
Verilog SystemVerilog RTL Timing_Closure Power_Optimization Clock_Gating ASIC_Development_Flows Simulation Synthesis Static_Timing_Analysis Python Perl TCL Shell Emulation Prototyping Formal_Verification_Pods

ASIC Design Engineer Technical Lead

Cisco

Remote (San Jose, CA) 11 days ago $183,800$263,600
Verilog SystemVerilog Python Perl TCL shell programming CDC Spyglass digital design principles microarchitecture concepts buffering scheduling architectures
Remote

ASIC Implementation Engineer

Broadcom

San Jose, CA 48 days ago $120,000$192,000
TCL PERL EDA Tools RTL Verilog Physical Design Place and Route Clock Tree Synthesis Floor-planning Layout Timing Closure EM/IR Analysis

ASIC Implementation Engineer

Broadcom

San Jose Innovation Drive, CA 110 days ago $141,300$226,000
EDA Synopsys Cadence Mentor Graphics VLSI Verilog RTL Tcl Perl Unix Python Git SVN JIRA Confluence CI/CD Linux

Careers

Qualcomm

Santa Clara, CA 94 days ago
Python Perl AMBA AHB APB AXI PCIe USB CoreSight AI/ML DFT FPGA CDC Clocking_architecture NoC

ASIC Design Engineer

Broadcom

Irvine, CA +1 73 days ago $108,000$172,800
EDA Synthesis Design_for_Test Floorplanning Place_and_Route Clock_Methodology Power_Planning_Analysis Timing_Closure Signal_Integrity Physical_Design_Checks