ASIC Digital Design Engineer Lead

Apple Inc

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
Austin, TX
Posted
42 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $201k
$143k most similar roles pay here $244k

This listing doesn't post a salary. Most similar roles pay $175,000–$227,300.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · ASIC Digital Design Engineer Lead

The ASIC Digital Design Engineer Lead joins the Custom Silicon Management Group to lead technical engagements between internal teams and silicon suppliers. This role focuses on the development of custom silicon for mobile products, specifically addressing display digital design challenges. You will be responsible for the architecture, implementation, verification, emulation, and validation of custom silicon while managing trade-offs against system limitations. Daily tasks include improving engineering requirement specification documents and driving vendor methodologies to meet specific standards to ensure bug-free first silicon. The role requires expertise in digital design principles and experience with FPGA emulation, silicon bring-up, characterization, or debug. Preferred skills include mixed signal design and familiarity with display interconnect standards like MIPI, DP, and HDMI, as well as knowledge of display pipeline elements and TCON development to solve complex hardware problems.

What you'll do

  • Assist in the architecture, implementation, verification, emulation, and validation of custom silicon.
  • Trade off specific technical issues against system limitations.
  • Improve engineering requirement specification documents for custom silicon products.
  • Collaborate with internal teams to ensure documentation meets project requirements.
  • Work with external vendors to develop micro-architecture, verification, and emulation of custom silicon.
  • Drive vendor methodologies to align with Apple's established standards.
  • Achieve bug-free first silicon to meet ambitious product schedules.

What we're looking for

  • Bachelor of Science degree.
  • Experience in digital design engineering.
  • Hands-on experience with at least two of the following: FPGA emulation, silicon bring-up, characterization, or debug.
  • 10+ years of relevant industry experience.
  • Experience with mixed signal design.
  • Experience with display interconnect standards such as MIPI, DP, and HDMI.
  • Experience with display pipeline elements and/or TCON development.
  • Good verbal and written communication skills.

More like this

Similar roles

ASIC Digital Design Engineer Lead

Apple Inc

San Diego, CA 42 days ago $166,600$296,000
Digital Design FPGA Silicon Bring-up Characterization Debug Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification
10+ yrs exp

ASIC Digital Design Engineer Lead

Apple Inc

Cupertino, CA 42 days ago $175,500$311,700
Digital Design FPGA Silicon Bring-up Characterization Debug Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification
10+ yrs exp

ASIC Design Engineer

Apple Inc

Cupertino, CA 37 days ago $184,700$324,800
ASIC Design SoC Design Power Management Microarchitecture Logic Design Lint CDC Synthesis ECO STA Physical Design Python Perl TCL Asynchronous Interfaces
10+ yrs exp

ASIC Design Engineer

Apple Inc

Cupertino, CA 37 days ago $150,400$277,600
ASIC Design SoC Design Power Management Microarchitecture Logic Design Lint CDC Synthesis ECO STA Physical Design Perl Python TCL System Architecture
3+ yrs exp

ASIC Design Engineer

Apple Inc

Beaverton, OR 144 days ago
Verilog RTL SOC Design Lint CDC Synthesis ECO STA Physical Design Python Perl TCL Microarchitecture Asynchronous Interfaces
10+ yrs exp

ASIC Design Engineer

Apple Inc

Santa Clara, CA 119 days ago $129,300$194,700
ASIC Design RTL Micro-architecture SoC DRAM PHY DFI Simulators System Architecture