Analog Layout Designer

Broadcom

Confirmed live today High trust
Closes in 7 days

Quick summary

Work type
On-site
Location
Irvine, CA
Salary
$108,000–$172,800 / yr
Employment
Full-time
Posted
173 days ago
Freshness
Confirmed live today
Closes
Nov 3, 2026 (soon)
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $202k
This role $140k
$91k $267k
below market most similar roles pay here above market

This role pays less than 90% of similar roles. Most pay $162,559–$241,750 — the blue band above. At the midpoint, this role pays about $140k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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At a glance

TL;DR · Analog Layout Designer

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The Analog Layout Designer joins a global layout and design team to provide onsite support for advanced nodes. This role requires working independently on block level and IP level analog layout design while coordinating with circuit designers and the layout team. Key responsibilities include performing floorplan and layout for analog modules such as SerDes, ADC/DAC, and PLL, as well as handling top-level integration. The position requires expertise in deep sub-micron processes, with a preference for FinFet experience. Candidates must demonstrate strong skills in debugging DRC, LVS, and antenna errors while managing ESD, latch-up, and EM concerns. The role utilizes Cadence tools and TSMC processes to solve complex layout issues requiring in-depth evaluation of variable factors and technical judgment.

Skills

Analog Layout RF Layout Cadence FinFET SerDes ADC DAC PLL DRC LVS ESD EM TSMC Top-level Integration

What you'll do

  • Perform block-level and IP-level analog layout design independently.
  • Execute floorplanning and layout for analog modules like SerDes, ADC/DAC, and PLL.
  • Manage top-level integration for complex analog designs.
  • Debug DRC, LVS, and antenna errors while addressing ESD, latch-up, and EM issues.
  • Determine methods and procedures for new assignments as a Team Lead.
  • Coordinate activities of other personnel and network with key contacts outside your area of expertise.
  • Utilize Cadence tools and TSMC processes for deep sub-micron and FinFet designs.

What we're looking for

  • Minimum of 8+ years of hands-on experience in Analog or RF layout.
  • Experience in block level and IP level Analog layout design.
  • Experience with floorplan and layout for analog modules like SerDes, ADC/DAC, and PLL.
  • Experience with top-level integration.
  • Understanding of analog layout concepts for deep sub-micron processes and fabrication processes.
  • Experience with FinFet processes (preferred).
  • Understanding of ESD, latch-up, and EM, with strong skills debugging DRC, LVS, and antenna errors.
  • Bachelor's degree and 8+ years of related experience required.

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