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CPU Design micro-architecture Logic Design C C++ Python Perl Verilog VHDL Synthesis Design Verification Formal Verification Silicon Validation Computer Architecture Physical Design +10 more Show less

STA TCL Python Perl PrimeTime Tempus ICC2 Innovus RTL GDS Spice ASIC CTS AOCV POCV Signal Integrity Layout Parasitic Extraction +12 more Show less

Physical Design SPICE RTL Circuit Design PLL Jitter Analysis Standard Cell Optimization RC Delay Device Physics Hardware Engineering Electrical Engineering +6 more Show less

ASIC Design RTL Design SoC FPGA Machine Learning IPs System Simulation Logic Design Scripting Process Automation Verification Data Center IPs Protocols Interfaces +8 more Show less

Physical Design SPICE RTL Circuit Design Standard Cell Optimization PLL Jitter Analysis RC Delay Device Physics Chip Physical Design Deep Submicron Process +6 more Show less

ASIC Design SoC Design RTL Design FPGA Machine Learning IPs System Simulation Scripting Logic Design Verification Process Automation Data Center IPs Protocols Interfaces +8 more Show less

PCBA Debug Python Linux SQL Layout Review Oscilloscope Logic Analyzer Protocol Analyzer 8D High-Speed IO power delivery, PDB Firmware +7 more Show less