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Active Keyword: Processor Verification Remove filter Clear all

14 of up to 20 (filtered)

Senior Microprocessor Verification Engineer

Amd

Fishkill, NY +1 3 days ago $178,400–$267,600
Actively hiring Confirmed live today Posted this week High trust Above market
C++ SystemVerilog Verilog HDL Python Perl Ruby x86 Assembly Computer Architecture ASIC SoC Formal Verification Simulation DFT RTL Tape-out
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Processor Design Verification Engineer

Qualcomm

San Diego, CA 35 days ago $111,600–$167,400
Actively hiring Confirmed live today High trust Below market
DSP Microprocessor Design Computer Architecture C C++ Python Embedded Systems Design Verification Digital Design Logic Design Machine Learning Instruction Set Architecture Architectural Simulators Design Synthesis Emulators Test Generators
2+ yrs exp
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CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $129,300–$194,700
Actively hiring Confirmed live yesterday Trusted Below market
CPU Architecture RTL Design Verilog System Verilog C C++ Assembly Performance Modeling Silicon Validation Performance Tuning Profiling Compiler Techniques OS Digital Logic Design
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CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
CPU Architecture RTL Design System Verilog Verilog C/C++ Assembly Performance Modeling Silicon Validation Performance Tuning Profiling Digital Logic Design Compiler Techniques
3+ yrs exp
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CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
CPU Architecture RTL Design System Verilog Verilog C/C++ Assembly Performance Modeling Silicon Validation Performance Tuning Profiling Digital Logic Design Compiler Techniques
10+ yrs exp
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CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
System Verilog Verilog UVM Python Perl Assembly Formal Verification UPF FPGA Emulation RTL Digital Logic Power Management Clock Control
10+ yrs exp
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CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
System Verilog Verilog UVM Python Perl Assembly Formal Verification UPF FPGA Emulation RTL Digital Logic Power Management Clock Control Simulation Testbenches Transactors Assertions
3+ yrs exp
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CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $129,300–$194,700
Actively hiring Confirmed live today Trusted Below market
System Verilog Verilog Python Perl TCL Assembly Formal Verification FPGA Emulation RTL Computer Architecture Digital Logic Power Management Clock Control Testbenches Transactors Assertions
Save

CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
System Verilog Verilog UVM Python Perl Assembly Formal Verification UPF FPGA Emulation RTL Digital Logic Power Management Clock Control Random Constraint Verification
3+ yrs exp
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CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $129,300–$194,700
Actively hiring Confirmed live today Trusted Below market
System Verilog Verilog Python Perl TCL Assembly Formal Verification FPGA Emulation RTL Computer Architecture Digital Logic Power Management Clock Control Testbenches Transactors Assertions
Save

CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
CPU Architecture RTL Design System Verilog Verilog C/C++ Assembly Performance Modeling Silicon Validation Performance Tuning Profiling Digital Logic Design Compiler Techniques
10+ yrs exp
Save

CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
CPU Architecture RTL Design System Verilog Verilog C/C++ Assembly Performance Modeling Silicon Validation Performance Tuning Profiling Digital Logic Design Scripting
3+ yrs exp
Save

CPU Processor Performance Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $129,300–$194,700
Actively hiring Confirmed live today Trusted Below market
C/C++ Assembly Verilog System Verilog RTL Design CPU Architecture Microarchitecture Performance Modeling Silicon Validation Performance Profiling Digital Logic Design Compiler Techniques
Save

CPU Processor Power Management Verification Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
System Verilog Verilog UVM Python Perl Assembly Formal Verification UPF FPGA Emulation RTL Digital Logic Power Management Clock Control
10+ yrs exp
Save