Browse tech roles

Agile R&D Index Design Digital Assets Equities OKR CFA PhD +3 more Show less

Electrical Engineering System Architecture Schematic Design Signal Integrity Embedded Systems Prototype Bring-up Manufacturing Test Flexible Circuits Wireless Systems Custom Silicon +5 more Show less

Verilog SystemVerilog VHDL Python Perl SPICE HSPICE CMOS FinFET Cadence Synopsys EDA Tools Digital Circuit Design SRAM Timing and Delay Analysis Power Management Monte Carlo SerDes Object-Oriented Programming Operating Systems +15 more Show less

Circuit Design RTL Layout Spice EM/IR Analysis Static Timing Analysis PnR Logic Synthesis Python Perl Tcl Make Power Gating DRC LVS Post-Silicon Characterization Hardware Security AI/ML +13 more Show less

FPGA VHDL Verilog Python MATLAB Vivado Embedded Software Digital Design Signal Processing Git Source Control Oscilloscope Spectrum Analyzer Signal Generator AMD/Xilinx SoC +11 more Show less

Electrical Engineering Schematic Design Layout HDI PCB SIP Flexible Circuits Digital Design Power Integrity RF Integration Python Failure Analysis Oscilloscope Spectrum Analyzer Frequency Counter DC-DC Converters Power Management High Speed Interfaces +12 more Show less

SystemVerilog Verilog ASIC Design RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design Flow RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Specification Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design Flow RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Specification Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design Flow RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Specification Digital Design +10 more Show less

SystemVerilog Verilog ASIC Design Flow RTL Design SoC Architecture AXI AHB UPF Low-Power Design LINT CDC RDC EDA Tools Micro-architecture Specification Digital Design +10 more Show less

RTL Design MATLAB DSP Fixed-point Synthesis CDC Power Analysis Microarchitecture VLSI SoC Signal Processing Bit-true Verification +7 more Show less

RTL Design MATLAB DSP Fixed-point Synthesis CDC Power Analysis VLSI SoC Microarchitecture Signal Processing +6 more Show less

RTL Design MATLAB DSP Fixed-point Synthesis CDC Power Analysis VLSI SoC Microarchitecture front end CAD tools +6 more Show less

5G NR 4G LTE C++ Python 3GPP Layer1 Layer 2 Layer 3 NAS Network Simulation Multi-threading Pre-silicon Emulation Virtual Platforms Keysight Anritsu R&S automation tool chain +12 more Show less

FPGA RTL SystemVerilog Verilog AMD/Xilinx Intel Vivado Quartus Python C++ Embedded Linux PCIe AXI SerDes LVDS Ethernet SpinalHDL RustHDL Git ARM +15 more Show less

FPGA RTL SystemVerilog Verilog AMD/Xilinx Intel Vivado Quartus Python C++ PCIe AXI SerDes LVDS Embedded Linux ARM SpinalHDL RustHDL Git Timing Closure CDC +16 more Show less

RTL Design MATLAB DSP Fixed-point Synthesis CDC Power Analysis VLSI SoC Microarchitecture Design Verification front end CAD tools +7 more Show less