Wireless RTL Design Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$184,700–$324,800 / yr
Posted
10 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k
This role $255k
$129k $346k
below market most similar roles pay here above market

This role pays more than 98% of similar roles. Most pay $168,500–$241,750 — the blue band above. At the midpoint, this role pays about $255k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Wireless RTL Design Engineer

The Wireless RTL Design Engineer joins the wireless silicon development team to develop signal processing intensive designs for wireless communication SoCs featuring diverse connectivity technologies. This role focuses on creating highly energy efficient designs and new technologies for wireless silicon. Key responsibilities include writing specifications based on MATLAB/C system models, defining microarchitecture, and performing RTL logic design and verification support. The engineer must run tools to ensure lint-free designs while collaborating with algorithm and software teams to optimize performance and power efficiency. Required skills include fixed-point knowledge, bit-true verifications, and an understanding of DSP communication algorithms. Candidates should possess knowledge of modern design techniques, low power logic design, and front end CAD tools such as synthesis, CDC, and power analysis to solve complex hardware problems.

What you'll do

  • Write technical specifications and documentation based on MATLAB/C system models.
  • Define microarchitectures for wireless communication SoCs.
  • Perform RTL logic design and provide verification support.
  • Run automated tools to ensure lint-free design.
  • Develop signal processing intensive designs for diverse connectivity technologies.
  • Optimize designs for performance and power efficiency in coordination with algorithm teams.
  • Implement energy-efficient and low-power logic design techniques.

What we're looking for

  • BS degree and a minimum of 10 years of relevant industry experience.
  • Knowledge and experience with fixed-point and bit-true verifications.
  • Understanding of DSP communication algorithms and trade-offs between performance and complexity.
  • Knowledge of modern design techniques and energy-efficient/low power logic design.
  • Ability to work well in a team and be productive under aggressive schedules.
  • Excellent communication skills and self-motivation.
  • Experience in front end CAD tools such as synthesis, CDC and power analysis (preferred).

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