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Calibre ICV Pegasus Python TCL Makefile DRC LVS ESD PERC CI/CD +6 more Show less

Calibre ICV Pegasus Python TCL Makefile DRC LVS ESD PERC CI/CD +6 more Show less

Calibre ICV Pegasus Python TCL Makefile DRC LVS ESD PERC CI/CD +6 more Show less

Python ASIC verification FPGA verification

Python CI/CD

Python ASIC verification FPGA verification

Python CI/CD

Python ASIC verification Test bench development

Python ASIC Design Verification Test Bench Development CI/CD

Python ASIC Verification

SystemVerilog UVM OVM Python MATLAB C C++ Perl Ruby Analog Mixed-Signal (AMS) DFT Kubernetes Azure CI/CD Git JIRA PostgreSQL MESON +13 more Show less

SystemVerilog Object-Oriented Programming Python C++ Docker Git CI/CD Linux VCS DVMS UVM SVUnit Perl Makefile Doxygen JIRA Confluence +12 more Show less

SystemVerilog UVM C Python HLS FPGA Simulation Regression Coverage CI/CD +5 more Show less

Verilog System Verilog UVM Git Vivado Palladium Zebu Veloce Perl Python Linux +6 more Show less

Verilog SystemVerilog UVM Python Perl CI/CD DFX HLS VCS NC Verilog ModelSim Git SVUnit Coverity SonarQube +10 more Show less

Verilog SystemVerilog UVM Python Perl PCIe CXL Object-Oriented_Programming Scripting Automation Simulation HLS CI/CD +8 more Show less