Staff/Sr. Staff Design Verification Engineer - QGOV
Qualcomm
At a glance
AI generatedJoin Qualcomm Technologies Inc.’s Design Verification team as a senior verification engineer with over 10 years of experience in RTL design and embedded systems architecture. You will develop scalable verification methodologies for simulation and emulation environments, create comprehensive test plans for hardware building blocks and standard interfaces like PCIe, DDR, and USB, and own end-to-end DV tasks including coding test benches, writing assertions, and achieving coverage goals. Essential skills include expertise in Verilog/SystemVerilog, UVM-based verification, and experience with emulation platforms such as Palladium and Veloce. Additionally, familiarity with communication protocols, formal verification methodologies, and scripting languages like Perl or Python is highly desirable. This role involves working on large-scale silicon design projects, requiring a strong understanding of chip-level functional models and the ability to develop CAD infrastructure for test and debug automations.
Skills
What you'll do
What we're looking for
Market check
This $192,000–$288,000 range sits above 78% of similar postings on FindRole.
Peer median band
$142,800–$230,100
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$157,050–$225,000
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 569 open roles on FindRole.
Listed pay typically runs $148,300–$224,400 across 536 roles with salary data.
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