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Active Keyword: CPU Cache Architect Remove filter Clear all

11 of up to 20 (filtered)

CPU Cache Architect

Amd

Remote (Fort Collins, CO) 6 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday Posted this week High trust Above market
C++ Verilog HDL Digital RTL Design Computer Architecture SoC Performance Modeling Performance Analysis Simulators Emulation Post-silicon Observation Scripting Hardware Design Microarchitecture
Remote
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CPU Cache Architect

Amd

Remote (Fort Collins, CO) 6 days ago $144,800–$217,200
Actively hiring Confirmed live today Posted this week High trust Below market
C++ Verilog HDL Digital RTL Design Computer Architecture SoC Performance Modeling Performance Analysis Emulation Post-silicon Observation Scripting Hardware Design Microarchitecture
Remote
Save

CPU Microarchitecture & Cache RTL Design Engineer

Amd

Fort Collins, CO 34 days ago $144,800–$217,200
Actively hiring Confirmed live today High trust Below market
VLSI RTL Design Verilog HDL Cache Architecture CPU Coherency NoC SoC Scripting Microarchitecture Timing Closure Design for Test Physical Design Routing Fabric
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CPU Cache Microarchitect/RTL Engineer

Apple Inc

Waltham, MA 40 days ago $165,800–$292,400
Actively hiring Confirmed live today Trusted Competitive pay
RTL Verilog VHDL Microarchitecture CPU Cache C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects
10+ yrs exp
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CPU Cache Microarchitect/RTL Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
RTL Design Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Design Coherence Protocols Interconnects Power Management
10+ yrs exp
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CPU Cache Microarchitect/RTL Engineer

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
RTL Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects Power Management
10+ yrs exp
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CPU Cache Microarchitect/RTL Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
RTL Design Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Design Coherence Protocols Interconnects Power Management
3+ yrs exp
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CPU Cache Microarchitect/RTL Engineer

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
RTL Verilog VHDL Microarchitecture C C++ Python Perl Simulators Formal Methods DFT SRAM Coherence Protocols Interconnects Power Management
3+ yrs exp
Save

CPU Cache Microarchitect/RTL Engineer

Apple Inc

Waltham, MA 40 days ago $165,800–$292,400
Actively hiring Confirmed live today Trusted Competitive pay
RTL Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects Power Management
10+ yrs exp
Save

CPU Cache Microarchitect/RTL Engineer

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
RTL Verilog VHDL Microarchitecture CPU Cache C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects
10+ yrs exp
Save

CPU Cache Microarchitect/RTL Engineer

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
RTL Verilog VHDL Microarchitecture C C++ Python Perl Formal Methods Simulation Emulation DFT SRAM Coherence Protocols Interconnects Power Management
10+ yrs exp
Save