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6 of up to 20 (filtered)

Advanced ASIC FPGA Verification Engineer

General Dynamics

Scottsdale, AZ 2 days ago $122,785–$136,215
Actively hiring Confirmed live today Posted this week High trust Below market
SystemVerilog UVM ASIC FPGA Verilog Python TCL Linux Questa Modelsim Formal Verification AXI PCIe DSP GitLab Constrained Random Testing Assertions Register Abstraction Layer Xilinx
5+ yrs exp Hybrid

Advanced ASIC FPGA Verification Engineer

General Dynamics

Remote (Scottsdale, AZ) 3 days ago $122,785–$136,215
Actively hiring Confirmed live today Posted this week High trust Below market
SystemVerilog UVM ASIC FPGA Verilog Python TCL Linux Questa ModelSim Formal Verification AXI PCIe DSP GitLab VHDL Constrained Random Testing Assertions Register Abstraction Layer
5+ yrs exp Remote

Senior Advanced ASIC FPGA Engineer

General Dynamics

Remote (Scottsdale, AZ) 3 days ago $152,462–$169,138
Actively hiring Confirmed live today Posted this week High trust Below market
ASIC FPGA SystemVerilog Verilog UVM OVM SVA Digital Signal Processing Formal Verification Constrained Random Testing Functional Coverage Synthesis Place and Route Agile Microsoft Office
8+ yrs exp Remote

Advanced ASIC FPGA Engineer

General Dynamics

Scottsdale, AZ 5 days ago $122,785–$136,215
Actively hiring Confirmed live today Posted this week High trust Below market
ASIC FPGA Verilog VHDL SystemVerilog Python Tcl Perl Vivado Libero ISE Synplify QuestaSim UVM OVM SVA Digital Design Synthesis Place and Route Timing Closure Clock-Domain-Crossing Logic Analyzer Oscilloscope
5+ yrs exp Hybrid

Advanced ASIC FPGA Verification Engineer

General Dynamics

Scottsdale, AZ 38 days ago $135,396–$150,205
Actively hiring Confirmed live yesterday High trust Below market
SystemVerilog UVM VHDL Verilog FPGA QuestaSim Vivado CI/CD Jenkins GitLab CI Python Tcl Bash Perl AXI4 AXI-Stream SVA Formal Verification Git ModelSim
5+ yrs exp

Advanced ASIC FPGA Design Engineer

General Dynamics

Scottsdale, AZ 38 days ago $135,396–$150,205
Actively hiring Confirmed live today High trust Below market
VHDL Verilog SystemVerilog FPGA Xilinx Microchip Vivado Libero QuestaSim ModelSim CI/CD Python Tcl Bash GitLab AXI4 AXI-Stream PCIe Ethernet AES SHA MicroBlaze Zynq Versal AI Engine
5+ yrs exp