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Active Keyword: Package Design Engineer Remove filter Location: San Jose Remove filter Clear all

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ASIC Package Design Engineer

Broadcom

San Jose, CA +2 8 days ago $143,800–$230,000
Actively hiring Confirmed live today High trust Competitive pay
IC Package Design Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity HBM DDR5 Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout RF Microwave ADC DAC
10+ yrs exp
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Package Design Engineer

Broadcom

San Jose, CA +2 26 days ago $101,000–$162,000
Actively hiring Confirmed live yesterday Trusted Below market
IC Package Design Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity Thermal Manufacturability Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout HBM DDR5 RF Microwave ADC DAC
5+ yrs exp
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IC Package Design Engineer

Cisco

San Jose, CA 39 days ago $155,000–$222,600
Actively hiring Confirmed live today High trust Competitive pay
ASIC Package Design PCB Design SI/PI high‑speed signaling EDA Tools Python Perl TCL Floorplanning stack‑up definition Tapeout multi‑die systems Interposers Power Delivery
5+ yrs exp Hybrid
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Package Design Engineer

Broadcom

San Jose, CA +2 49 days ago $82,500–$132,000
Actively hiring Confirmed live today Trusted Below market
Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout HBM DDR5 RF Microwave ADC DAC Manufacturability Automation
2+ yrs exp
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Package Design Engineer

Broadcom

San Jose, CA +2 148 days ago
Actively hiring Confirmed live today Trusted
IC Package Design Flip-chip BGA SerDes Signal Integrity Power Integrity ASIC HBM DDR5 RF Microwave Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout Automation Manufacturability
10+ yrs exp
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