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11 of up to 20 (filtered)

Video Design Verification Engineer

Qualcomm

San Diego, CA 53 days ago $99,400$149,200
Actively hiring Below market
C C++ Python Computer Architecture Embedded Systems Video Codec Computer Vision HW and FW Development KPI Analysis System Performance Metrics Problem Triaging Customer Requirements Analysis Technical Documentation Feature Description Writing

Wireless PHY Design Verification Engineer

Apple Inc

San Diego, CA 53 days ago $120,300$210,100
Actively hiring Verified listing Competitive pay
SystemVerilog UVM IEEE 802.11 Bluetooth Cellular DPIs Transaction-Level Modeling Packet-Based Approaches Scoreboarding Assertions Constrained Random Testing Functional Coverage Implementation DSP Algorithms Verification Bit/Cycle Matching ASIC Verification Flows

Senior GPU Design Verification Engineer - Power

Qualcomm

San Diego, CA 58 days ago $133,600$200,400
Actively hiring Below market
SystemVerilog UVM OVM Python UPF FunctionalCoverage PowerAwareVerification EmulationVerification HardwareSoftwareCoVerification GPU CPU DDR Bus

Design Verification Engineer

Apple Inc

San Diego, CA 58 days ago $120,300$210,100
Actively hiring Below market
UVM SystemVerilog Python C/C++ Perl LLMs MCPs SVA CI/CD Docker Git JIRA Confluence 4G/5G cellular physical layer operation 3GPP AHB AXI NOC Bus Fabric

Design Verification Engineer

Apple Inc

San Diego, CA 58 days ago $171,600$302,200
Actively hiring Above market
SystemVerilog UVM Python Perl LLMs MCPs C C++ SVA Coverage-driven verification RTL simulation Constraint random testing AHB AXI NOC Bus Fabric

GPU Design Verification Engineer

Qualcomm

San Diego, CA +3 71 days ago $161,800$273,400
Actively hiring Above market
SystemVerilog UVM C/C++ Python Veloce Palladium Zebu FPGA Vulkan DX11 DX12 Make Airflow GNU Toolchain Visual Studio Formal verification FPV DPV QEMU Embedded FW Development Linux Kernel Architecture C/C++ Debugging gdb uboot uefi kernel-mode drivers

Staff/Sr. Staff Design Verification Engineer - QGOV

Qualcomm

San Diego, CA 86 days ago $164,000$246,000
Actively hiring Competitive pay
Verilog SystemVerilog UVM Git Vivado Palladium Zebu Veloce C++ Python Perl Linux AXI4-x DDRx PCIe JTAG DPI Simulation Emulation Formal Verification Static Verification

Silicon Design Verification Engineer in Austin, Texas | Advanced Micro Devices, Inc

Amd

Santa Clara, CA +3 98 days ago $121,680$121,680
Actively hiring Verified listing Below market
SystemVerilog UVM VMM OVM Synopsys VCS Cadence IES AXI3/4 DDR4/5 HBM PCIe ASIC FPGA SOC NetWork on Chip (NOC) verification gate level simulation power verification reset verification contention checking abstraction techniques formal property checking tools Cadence IEV Jasper Synopsys VC-Formal Synopsys Magellan