Principal Design Verification Engineer - QGOV
Qualcomm
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This role pays more than 54% of similar roles. Most pay $174,200–$234,012 — the shaded band above. At the midpoint, this role pays about $205k versus about $204k for comparable roles.
Based on 240 similar postings.
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Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 763 open roles on FindRole.
Listed pay typically runs $151,900–$229,800 across 453 roles with salary data.
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Join Qualcomm Technologies Inc.’s Design Verification team as a senior verification engineer, where you will develop scalable and portable verification methodologies for RTL designs in Verilog and SystemVerilog, focusing on hardware building blocks and standard interfaces like PCIe, DDR, USB, I2C, SPI. Your daily tasks include creating test plans, coding test benches, writing assertions, running simulations, and achieving coverage goals using UVM-based verification techniques. You will also explore innovative methodologies such as formal verification to enhance the quality and efficiency of your work. The role requires expertise in SystemVerilog, UVM/OVM, and experience with emulation platforms like Palladium and Zebu, along with a strong understanding of chip-level functional models and OOP concepts. Ideal candidates are self-starters who can develop and maintain CAD infrastructure for silicon design teams while collaborating effectively within the team.
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