Masters ASIC Package Engineering Co-op/Intern

Amd

Confirmed live 2 days ago Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CASanta Clara, CA
Salary
$83,200–$124,800 / yr
Employment
Intern
Posted
17 days ago
Freshness
Confirmed live 2 days ago
Closes
Aug 25, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $174k
This role $104k
$67k most similar roles pay here $235k

This role pays less than 79% of similar roles. Most pay $133,375–$214,000 — the shaded band above. At the midpoint, this role pays about $104k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Masters ASIC Package Engineering Co-op/Intern

The 2027 Masters ASIC Package Engineering Co-op/Intern will join the engineering team to help bring advanced packaging technology to reality. This role involves supporting package design and development engineers by prioritizing and optimizing new projects. Day-to-day responsibilities include completing substrate, interposer, and bump designs for products, test vehicles, and probe card substrates. The individual will also perform design verification implementation to ensure performance and quality while analyzing yield and defect metrics. Additionally, the role involves evaluating and benchmarking packaging materials to achieve cost-efficient designs. Candidates should possess knowledge of semiconductor theory, transmission lines, and electric circuits. Preferred technical skills include experience with package, silicon, or PCB design software; scripting languages like Perl, Python, or SQL; and data analytics tools such as PowerBI. The work focuses on solving complex hardware challenges within the advanced semiconductor packaging domain.

What you'll do

  • Support Package design and Development Engineers in prioritizing and optimizing new projects.
  • Complete substrate, interposer, and bump designs for products, test vehicles, and probe card substrates.
  • Implement design verification tasks to ensure product performance, quality, and efficiency.
  • Analyze yield and defect metrics to improve overall design performance.
  • Evaluate and benchmark packaging materials to achieve cost-efficient designs.
  • Interact with partners to meet specific performance and yield requirements.

What we're looking for

  • Must be currently enrolled in a Master's degree program at a US-based university.
  • Major must be in Electrical Engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Material Science Engineering, or a related field.
  • Knowledge of transmission lines and electric circuits (preferred).
  • Experience with package, silicon, or PCB design software (preferred).
  • Proficiency in scripting languages such as Perl, Python, or SQL (preferred).
  • Knowledge of semiconductor theory and packaging process/technology (preferred).
  • Experience with data analytics and visualization tools like PowerBI (preferred).

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