Senior Memory Controller Verification Engineer
Santa Clara, CA
+4
52 days ago
$168,000–$264,500
Actively hiring
Confirmed live 3 days ago
Trusted
Above market
System Verilog
UVM
VCS
C++
C
Python
Perl
Shell
FPGA
RTL
Post-silicon Verification
DDR
LPDDR
HBM
GDDR
GDB
Debussy
6+ yrs exp
Hybrid