Wireless Design Engineer

Apple Inc

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $171,600–$302,200 / yr
Posted: 29 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $169k

This role $237k

$106k most similar roles pay here $323k

This role pays more than 93% of similar roles. Most pay $145,000–$192,500 — the shaded band above. At the midpoint, this role pays about $237k versus about $169k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 969 open roles on FindRole.

Listed pay typically runs $163,300–$272,100 across 756 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Wireless Design Engineer

Apply Now Log in to save

As a Wireless Design Engineer at our silicon design group, you will play a pivotal role in developing high-performance, low-power RTL designs for wireless MAC interfaces within the broader wireless SoC ecosystem. Your responsibilities include defining microarchitecture, writing specifications, and collaborating with software and system teams to ensure optimal power and area efficiency while maintaining advanced features and performance. You will use front-end tools to achieve lint-free and clean design standards, perform synthesis and timing constraints, conduct power analysis and optimization, and develop methodologies for your designs. The ideal candidate has a strong background in computer architecture, experience with ASIC design flows including Lint, CDC, STA, and LEC, and knowledge of wireless protocols such as Bluetooth or WLAN. Proficiency in HDL languages like Verilog/SystemVerilog and scripting languages is preferred, along with the ability to work effectively under tight deadlines.

Skills

RTL SystemVerilog Verilog Python Perl Shell CDC RDC STA Lint ASIC MAC Bluetooth WLAN Zigbee AXI APB AHB Memory systems Power management Encryption/decryption engines High-speed data path and control units

What you'll do

Develop high-performance, low-power ASIC design for wireless MAC.
Write specifications and define microarchitecture for wireless MAC IPs.
Perform RTL logic design, IP integration, and verification support.
Ensure lint-free and CDC/RDC clean design using front-end tools.
Conduct power analysis and optimization to achieve optimal trade-offs.
Collaborate with system and software teams to ensure functionality.

What we're looking for

Proven track record of high-performance low-power ASIC designs.
Solid background in computer architecture including bus fabric, memory systems, power management, encryption engines, and numeric units.
Experience with ASIC design front-end flows (Lint, CDC, STA, LEC).
Knowledge of MAC layer in wired/wireless communication systems preferred.
Familiarity with wireless protocols such as Bluetooth, WLAN, or Zigbee.
5+ years hands-on experience in ASIC design flow and SoC top-level integration.
Proficiency in HDL languages like Verilog/SystemVerilog and scripting languages.