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Wireless FPGA Prototype Design Engineer

Apple Inc

San Francisco, CA 21 days ago $181,100–$318,400
Actively hiring Verified listing Above market
FPGA Verilog Python Perl Shell C JTAG Oscilloscope Logic Analyzer LitePoint Palladium IEEE 802.11 Bluetooth APB AHB AXI USB I2C SPI
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Wireless Design Engineer

Apple Inc

Sunnyvale, CA 29 days ago $181,100–$318,400
Actively hiring Verified listing Above market
RTL SystemVerilog Verilog Python Perl Shell CDC RDC STA Lint ASIC MAC Bluetooth WLAN Zigbee AXI APB AHB Memory systems Power management Encryption/decryption engines High-speed data path Control units
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Wireless SoC Design Engineer

Apple Inc

Sunnyvale, CA 38 days ago $126,800–$220,900
Actively hiring Verified listing Competitive pay
SystemVerilog RTL Lint CDC RDC Synthesis STA Memory_subsystems Bus_interfaces CPU_integration DMA_engines Compression Security_IP_design PCIE QSPI UART SPMI Cross_clock_domain_design ASIC_low_power_design Multiple_supply_domains Dynamic_power_scaling Power_analysis DFT Scan_insertion Memory_BIST
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Wireless SoC Design Engineer

Apple Inc

San Diego, CA 38 days ago $120,300–$210,100
Actively hiring Verified listing Below market
SystemVerilog RTL Lint CDC RDC Synthesis STA MemorySubsystemDesign BusInterfaces CPUIntegration DMAEngines CompressionIP SecurityIP PCIE QSPI UART SPMI CrossClockDomainDesign ASICLowPowerDesign DFT ScanInsertion MemoryBIST
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Wireless FPGA Prototype Design Engineer

Apple Inc

San Francisco, CA 41 days ago $126,800–$220,900
Actively hiring Competitive pay
FPGA Verilog Python Perl Shell C JTAG Oscilloscope Logic Analyzer LitePoint Palladium IEEE 802.11 Bluetooth APB AHB AXI USB I2C SPI
Save