Timing Design Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Austin, TX
Posted
45 days ago

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Salary context

How this pay compares to similar roles

Similar $186k
$132k most similar roles pay here $229k

This listing doesn't post a salary. Most similar roles pay $159,225–$213,375.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 969 open roles on FindRole.

Listed pay typically runs $163,300–$272,100 across 756 roles with salary data.

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At a glance

TL;DR · Timing Design Engineer

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As a Timing Design Engineer at Apple, you will join a dynamic hardware team focused on cutting-edge technology development. Your primary responsibilities include designing and validating timing closure for complex SoCs, ensuring high performance and reliability in consumer electronics. Day-to-day tasks involve working with advanced EDA tools to analyze and optimize signal integrity, as well as collaborating closely with other engineering teams to resolve timing issues. Ideal candidates possess expertise in scripting languages like Python or Perl, proficiency in Cadence Virtuoso for layout design, and a deep understanding of CMOS circuitry. This role requires experience with large-scale semiconductor projects and an ability to tackle intricate challenges in high-speed digital circuits, contributing significantly to Apple’s innovative product lineup.

Skills

No skills listed

What you'll do

  • Develop timing analysis methodologies for complex digital designs.
  • Perform static timing analysis using industry-standard tools like PrimeTime or Tempus.
  • Identify and resolve timing violations in circuit design layouts.
  • Optimize clock trees to meet performance requirements without compromising power consumption.
  • Collaborate on the development of new features for timing closure tools.

What we're looking for

  • 5+ years of experience in timing analysis and design for high-performance digital circuits.
  • Proficient in using industry-standard EDA tools for timing closure and optimization.
  • Strong understanding of clock distribution networks and phase-locked loops (PLLs).
  • Experience with scripting languages to automate timing analysis tasks.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.

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