Substrate Package Layout Engineer

Broadcom

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$141,300–$226,000 / yr
Employment
Full-time
Posted
165 days ago
Freshness
Confirmed live today
Closes
Oct 17, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $206k
This role $184k
$127k most similar roles pay here $274k

This role pays less than 62% of similar roles. Most pay $169,500–$241,750 — the shaded band above. At the midpoint, this role pays about $184k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 172 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 125 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Substrate Package Layout Engineer

Substrate/Package Layout Engineer The Substrate/Package Layout Engineer joins the design team to take primary responsibility for the layout, routing, and functionality of packages and substrates, including high-speed lines. This role involves designing advanced substrates and IC packages while developing and utilizing script-based layout tools. The engineer performs design rule checking and layout versus schematic checks while collaborating with mechanical, electrical, and power/signal integrity engineers to ensure performance requirements are met. Key technical skills include proficiency in Cadence tools like Allegro Package Design, Innovus, and Virtuoso, as well as Calibre and Klayout. The role involves managing vendor specifications for panel and stack-up designs and evaluating parts from the fab through visual inspection and electrical characterization. The work focuses on multilayer high-speed RF design, surface mount technology, and complex package manufacturing processes to solve critical integration challenges.

What you'll do

  • Design and layout advanced IC substrates and packages including high-speed lines.
  • Perform design rule checking (DRC) and layout vs. schematic (LVS) checks.
  • Develop and utilize script-based tools to improve layout methodologies and flows.
  • Coordinate with vendors to define layout, panel, stack-up designs, and specifications.
  • Conduct visual inspections and electrical functionality tests on parts returned from the fab.
  • Characterize high-speed electrical lines and perform design simulations for improvement.
  • Execute peer reviews of substrate and package designs to ensure performance requirements are met.

What we're looking for

  • Bachelor's degree in Material Science, Electrical, Computer, or Mechanical Engineering with at least 12 years of experience.
  • Master's degree with at least 10 years of related experience.
  • PhD with at least 7 years of related experience.
  • Deep knowledge and expertise using Cadence layout tools and Electronic Design Automation (EDA) tools.
  • Experience with Calibre, Klayout, Allegro Package Design, Innovus, and Virtuoso.
  • Broad understanding of multilayer high speed RF design, package/substrate manufacturing processes, materials, and surface mount technology.
  • Ability to perform design rule checking (DRC) and layout vs schematic (LVS) checks.
  • Experience with script-based layout tools.

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