This role pays less than
85%
of similar roles. Most pay
$172,375–$227,500
— the shaded band above.
At the midpoint, this role pays about
$158k
versus about
$200k
for comparable roles.
Based on 240 similar postings.
Employer
About Broadcom
Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software
Broadcom currently has
224 open roles
on FindRole.
Listed pay typically runs
$121,900–$195,000
across 161 roles with salary data.
Staff Semiconductor Power Engineer (ICB4) joins the semiconductor design team as the primary driver for power strategies, taking full ownership of end-to-end power definition, analysis, and optimization for next-generation chips. This role involves managing the complete power lifecycle for complex SoCs, from early architectural budgeting to final silicon validation. The engineer will conduct dynamic and leakage power analysis at RTL, Gate-level, and Post-layout stages while developing automated flows and scripts. Key responsibilities include identifying bottlenecks, implementing reduction strategies like clock gating and DVFS, and collaborating with physical design and systems teams on PDN sign-off and thermal constraints. Required skills include proficiency in EDA tools such as Synopsys Pt-PX, Ansys RedHawk, or Cadence Joules, knowledge of UPF/CPF formats, and the ability to use AI coding assistants for Python, Tcl, and Perl scripting.
Lead the complete power lifecycle for complex SoCs from architectural definition to silicon validation.
Conduct dynamic and leakage power analysis at RTL, Gate-level, and Post-layout stages using EDA tools.
Develop and maintain advanced power analysis flows, automation scripts, and methodologies to improve turnaround time.
Identify power bottlenecks and implement reduction strategies like clock gating and dynamic voltage scaling.
Partner with physical design teams on power grid sign-off and IR/EM drop analysis.
Collaborate with systems teams to align on thermal constraints, packaging, and power profiles.
Correlate pre-silicon power estimates with post-silicon laboratory measurements.
What we're looking for
A Bachelor's degree in Electrical Engineering or Computer Engineering with at least 8 years of experience is required.
A Master's degree in Electrical Engineering or Computer Engineering with at least 6 years of experience is required.
Proven track record in semiconductor power definition, estimation, and optimization for complex SoCs or high-performance IPs.
Hands-on experience with industry-standard power analysis and sign-off tools such as Synopsys Pt-PX, PrimePower, Ansys RedHawk, Cadence Joules, or PowerArtist.
Deep understanding of modern low-power design intents (UPF/CPF), CMOS device physics, and power reduction techniques.
Proficiency in using AI coding assistants to develop and optimize scripts in Python, Tcl, or Perl for workflow automation.
Experience taping out designs in advanced semiconductor technology nodes such as 7nm, 5nm, or 3nm (preferred).
Familiarity with thermal modeling, power delivery network (PDN) design, and voltage drop mitigation (preferred).
ASIC
RTL
Verilog
VHDL
System Verilog
UPF
CPF
Conformal Low Power Check
Python
Tcl
Perl
DFT
Synthesis
Timing Closure
Power Analysis
Power Modeling
Prime Power
PowerArtist
PtPx