Staff Engineer, High-Speed I/O Analog-Mixed Circuit

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $188k
This role $208k
$133k most similar roles pay here $266k

This role pays more than 73% of similar roles. Most pay $159,600–$216,250 — the shaded band above. At the midpoint, this role pays about $208k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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At a glance

TL;DR · Staff Engineer, High-Speed I/O Analog-Mixed Circuit

As a Staff Engineer at Samsung’s Memory IO Lab, you will join a team dedicated to developing cutting-edge memory interface technology solutions for DDR, LPDDR, GDDR, and HBM I/O interfaces. Your role involves hands-on analog circuit design, including high-speed data converters, PLLs, and SERDES, alongside layout floor-planning and supervision of layout activities. You will simulate designs using state-of-the-art CAD tools like Cadence and MATLAB (Simulink), document your work meticulously, and collaborate closely with cross-disciplinary teams to ensure successful product roadmaps. Ideal candidates have extensive experience in high-speed serial interfaces, advanced CMOS technology nodes, and a deep understanding of PPA trade-offs. Proficiency in EDA tools, scripting languages like Tcl/Perl, and Python is essential for automating design processes and handling silicon bring-up tasks efficiently.

What you'll do

  • Design and simulate high-speed analog-mixed signal circuits including data converters, PLLs, and SERDES.
  • Optimize layout floor-planning for block and top-level designs to enhance performance.
  • Provide detailed guidelines and hands-on support for layout engineers in drawing layouts.
  • Own circuit and system specifications, ensuring alignment with project goals.
  • Document design processes and simulation results thoroughly.

What we're looking for

  • 5+ years of experience in high-speed serial interfaces and analog mixed-signal circuit design.
  • Expertise in designing standard high-speed interfaces like DDR, LPDDR, GDDR, HBM I/O interface.
  • Proficiency in layout requirements for high-speed circuits and hands-on layout skills if necessary.
  • Deep understanding of PPA (performance, power, area) trade-offs in high-speed I/O designs.
  • Experience with EDA tools such as Cadence, MATLAB/Simulink, and EM tools.
  • Strong scripting and automation skills using Tcl/Perl; knowledge of Python is beneficial.

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