CAD Engineer

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Austin, TXFt. Collins, CO
Salary
$144,800–$217,200 / yr
Posted
21 days ago
Freshness
Confirmed live today
Closes
Oct 6, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k
This role $181k
$132k $264k
below market most similar roles pay here above market

This role pays less than 63% of similar roles. Most pay $165,037–$227,900 — the blue band above. At the midpoint, this role pays about $181k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · CAD Engineer

Role Posting Log in to save

As a STA - CAD Engineer within the CAD Methodology team, you will develop and deploy differentiating methodologies for next generation designs across adaptive embedded computing, server, desktop, and laptop segments. Your daily responsibilities include delivering timing methodology flows, releasing high quality flows, providing technical leadership, and mentoring others in a global environment. You will evaluate and qualify new EDA tools, analyze timing reports to identify design or constraint issues, and collaborate with ML teams to optimize machine learning models for EDA workflows. Required technical skills include proficiency in STA methodologies, Verilog, System Verilog, and 3DIC design implementation. You must demonstrate expert use of STA signoff, extraction, and placement and routing tools, alongside strong scripting capabilities in Perl, Python, and TCL on UNIX systems.

Skills

STA Verilog System Verilog Python Perl TCL UNIX EDA Machine Learning 3DIC Timing Analysis Data Preprocessing Feature Engineering Simulation Performance Analysis

What you'll do

  • Develop and deliver timing methodology flows for next-generation AMD designs.
  • Release high-quality flows and provide technical support to design teams on critical issues.
  • Evaluate and qualify new EDA tool capabilities and collaboratively develop new features.
  • Develop and optimize machine learning models for EDA workflows in collaboration with CAD and ML teams.
  • Automate design verification, simulation, and performance analysis using machine learning techniques.
  • Perform data preprocessing, feature engineering, and model evaluation for silicon design datasets.
  • Integrate machine learning tools into internal CAD infrastructure and workflows.
  • Document findings and provide technical presentations to improve design efficiency and accuracy.

What we're looking for

  • Bachelors or Masters degree in computer engineering or Electrical Engineering.
  • Strong digital circuit fundamentals and proficiency in STA methodologies for timing closure (preferred).
  • Expert user of STA signoff, extraction, placement, and routing tools (preferred).
  • Experience analyzing timing reports and identifying design or constraint issues (preferred).
  • Familiarity with Verilog and System Verilog for design (preferred).
  • Familiarity with 3DIC design implementation, EDA tool competence, and strong scripting capability (preferred).
  • Excellent UNIX and programming skills in Perl, Python, and TCL (preferred).
  • Experience collaborating with CAD and ML teams to develop and optimize machine learning models for EDA workflows (preferred).

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