Senior Radio Frequency Integrated Circuit (RFIC) Design Engineer

Qualcomm

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$127,200–$190,800 / yr
Posted
81 days ago
Freshness
Confirmed live 2 days ago
Closes
Dec 19, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $188k
This role $159k
$116k most similar roles pay here $234k

This role pays less than 75% of similar roles. Most pay $159,700–$216,250 — the shaded band above. At the midpoint, this role pays about $159k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Senior Radio Frequency Integrated Circuit (RFIC) Design Engineer

The Sr Radio Frequency Integrated Circuit (RFIC) Design Engineer joins the RFIC Design team to define, design, and develop complex radio frequency integrated circuits within sophisticated SoCs and discrete RFICs. This role involves performing radio signal path and circuit topology analysis alongside detailed transistor-level design of highly-integrated transceivers for wireless applications including 6G, WLAN, and IoT using advanced process technologies. The engineer will determine circuit-level specifications, develop architectures, run simulations, floor-plan layouts, and write test plans to assess performance. Key technical requirements include proficiency in CADENCE, Virtuoso, and ADS tools. Candidates must possess expertise in RFIC design, transistor-level design of RF analog integrated circuits, and potentially digital predistortion or machine learning applications for RF designs. The role addresses the challenge of developing high-performance components for advanced wireless communication systems.

What you'll do

  • Define circuit-level specifications based on system-level requirements with minimal supervision.
  • Develop the architecture and design of RFIC blocks using specialized tools and technical expertise.
  • Perform transistor-level design and radio signal path analysis for 6G, WLAN, and IoT applications.
  • Run simulations to evaluate circuit performance under various conditions and resolve design problems.
  • Independently floor-plan layouts and conduct physical verification in coordination with layout engineers.
  • Write test plans and review results to identify bugs and provide instructions to test engineers.
  • Debug hardware issues and escalate complex technical problems as necessary.
  • Create detailed technical documentation and feature descriptions to guide users.

What we're looking for

  • Bachelor's degree in Computer Science, Engineering, Information Systems, or a related field with 2+ years of relevant experience.
  • Master's degree in Computer Science, Engineering, Information Systems, or a related field with 1+ year of relevant experience.
  • PhD in Computer Science, Engineering, Information Systems, or a related field.
  • At least 2 years of ASIC design, verification, or related work experience.
  • At least 2 years of academic or professional experience using two or more of the following: CADENCE, Virtuoso, or ADS.
  • Technical knowledge of radio frequency integrated circuit (RFIC) design and related tools/technologies.
  • Ability to perform complex analysis, simulation, and transistor-level design for wireless applications like 6G, WLAN, and IoT.
  • Strong communication skills to convey technical information clearly to both technical and non-technical audiences.

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