Sr Radio Frequency Integrated Circuit (RFIC) Design Engineer

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$127,200–$190,800 / yr
Posted
6 days ago
Closes
Dec 19, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k
This role $159k
$116k most similar roles pay here $227k

This role pays less than 71% of similar roles. Most pay $156,550–$209,750 — the shaded band above. At the midpoint, this role pays about $159k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 834 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 514 roles with salary data.

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At a glance

TL;DR · Sr Radio Frequency Integrated Circuit (RFIC) Design Engineer

Join Qualcomm Technologies Inc.’s RFIC Design team as a senior engineer where you will define, design, and develop complex radio frequency integrated circuits for advanced wireless applications such as 6G, WLAN, and IoT using cutting-edge process technologies. Your daily tasks include analyzing signal paths, performing detailed transistor-level designs, running simulations to assess circuit performance under various conditions, and collaborating with layout engineers to generate and verify physical layouts. You will also write test plans, debug issues, and contribute to the development of new ideas within a large matrixed organization. Essential skills include proficiency in CADENCE, Virtuoso, or ADS, along with strong analytical, communication, and technical knowledge in RFIC design. Experience in areas like receiver/transmitter circuit design, digital control, and signal processing is highly preferred.

What you'll do

  • Determines circuit-level specifications based on system-level requirements independently.
  • Develops architecture and design of RFIC blocks using advanced tools and applications.
  • Runs simulations to evaluate circuit performance under various conditions.
  • Floor-plans layout and collaborates with layout engineers for physical verification.
  • Writes test plans, reviews results, and provides instructions to test engineers.
  • Debugs issues in designs and escalates complex problems effectively.

What we're looking for

  • Bachelor's degree in Engineering or related field with 2+ years of relevant work experience.
  • Master's degree in Engineering or related field with 1+ year of relevant work experience.
  • Experience using CADENCE, Virtuoso, ADS for RFIC design and verification.
  • Ability to independently floor-plan layout and conduct physical verification on circuits.
  • Strong analytical skills to interpret data from multiple sources and identify trends.
  • Proficient in writing test plans and debugging issues in circuit designs.

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