Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

Quick summary

Work type: On-site
Location: Irvine, CA
Salary: $160,000–$225,000 / yr
Posted: today

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Competitive pay

How this pay compares to similar roles

Similar $184k

This role $192k

$141k most similar roles pay here $234k

This role pays more than 62% of similar roles. Most pay $160,749–$208,000 — the shaded band above. At the midpoint, this role pays about $192k versus about $184k for comparable roles.

Based on 240 similar postings.

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About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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At a glance

TL;DR · Sr. IC Package Design Engineer (Silicon Engineering)

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As a Senior IC Package Design Engineer at SpaceX in Irvine, CA, you will lead packaging for custom ASICs and RFICs used in digital beam formers and modems. Your daily responsibilities include driving advanced package selection, optimizing BGA configurations, and conducting design verification and tapeout. You will collaborate with cross-functional teams to ensure feasibility analysis and innovative solutions are implemented, focusing on signal/power integrity and RF performance optimization. Essential skills include experience with Cadence APD+/SIP tools, substrate design for various die types, and proficiency in SI/PI simulation tools like SIWave and ADS. This role demands a strong background in electrical engineering or physics and at least five years of IC package design experience, along with the ability to work flexible hours to meet critical deadlines.

Skills

Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM Simulation Package Design Electrical Review Substrate Design RFIC ASIC Manufacturing Reviews

What you'll do

Own and drive advanced package selection and new product BGA configuration.
Responsible for package/SIP layout, optimization, design verification, and tapeout.
Interface with cross-functional groups on new product package selection and feasibility analysis.
Simulate and optimize signal/power integrity and RF performance of the package design.
Drive methodology innovations and productivity improvements in package design.

What we're looking for

5+ years of experience in IC package design
Experience with Co-packaged Optics (CPO) and Cadence APD+/SIP tools
Thorough understanding of signal and power integrity fundamentals
Substrate design experience for RF, digital, high-speed, and mixed-signal die
Proficient in SI/PI and EM simulation tools such as SIWave, HFSS, ADS
Strong problem-solving skills with solid engineering fundamentals

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